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Mingyao Yang

dblp:38/589 · DBLP profile ↗
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3ranked-venue papers
2as first author
0since 2021 · last 2002
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Interconnection networks and networks-on-chip · 76% Electronic design automation · 19% Parallel and multicore computing · 6%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Interconnection networks and networks-on-chip › routing algorithms
deadlock-free routing
0.012000
Incremental Design of Scalable Interconnection Networks Using Basic Building Blocks · IEEE Trans. Parallel Distributed Syst. 2000
Interconnection networks and networks-on-chip
network topology
0.012000
Incremental Design of Scalable Interconnection Networks Using Basic Building Blocks · IEEE Trans. Parallel Distributed Syst. 2000
Electronic design automation › physical design
routing
0.012000
Incremental Design of Scalable Interconnection Networks Using Basic Building Blocks · IEEE Trans. Parallel Distributed Syst. 2000
Interconnection networks and networks-on-chip › interconnect architecture
scalable interconnect
0.012000
Incremental Design of Scalable Interconnection Networks Using Basic Building Blocks · IEEE Trans. Parallel Distributed Syst. 2000
Interconnection networks and networks-on-chip › routing algorithms
turn model
0.012000
Incremental Design of Scalable Interconnection Networks Using Basic Building Blocks · IEEE Trans. Parallel Distributed Syst. 2000
Parallel and multicore computing
multicomputer
0.012000
Incremental Design of Scalable Interconnection Networks Using Basic Building Blocks · IEEE Trans. Parallel Distributed Syst. 2000

Methods — techniques the papers use, named apart from their topics

wormhole routing · 0.0XY routing · 0.0
YearPublicationVenuePosition
2002 CoStore: A Storage Cluster Architecture Using Network Attached Storage Devices
abstract
We propose a storage cluster architecture CoStore, which evenly distributes system responsibilities across all collaborating cluster members without a separate central file manager. The serverless CoStore architecture has the potential to provide scalable high-performance high-capacity storage services with strong reliability and availability, traditionally only achievable by high-end storage systems. A prototype CoStore system has been implemented using cost-effective COTS-based network attached storage devices on commodity operating systems. The performance of the CoStore prototype has been measured and compared with those of other commonly available distributed file systems. Preliminary test results show that a single node CoStore has a comparable performance to that of NFS and that CoStore outperforms CIFS on Windows 2000.
Lionel M. Ni, Mingyao Yang
ICPADS3
2000 Incremental Design of Scalable Interconnection Networks Using Basic Building Blocks
abstract
In this paper, we present an incremental design of scalable interconnection networks in multicomputer systems using basic building blocks. Both network topologies and routing algorithms are considered. We use wormhole-routed small-scale 2D meshes as basic building blocks. The minimum requirement to expand these networks is a single building block. This implies that the network does not have to maintain the regular 2D mesh topology. Some new topologies are introduced: incomplete meshes based on those adaptive routing algorithms designed from the turn model and extended incomplete meshes based on XY routing. We show that the original routing algorithm can be adopted to send a message between any source and destination without using store-and-forward and causing deadlock. The way that the network is constructed incrementally requires no or a very small amount of rewiring and keeps high bisection density and short diameter of the network. The design methods can be used to economically and incrementally build expandable and scalable parallel computers.
Mingyao Yang, Lionel M. Ni
IEEE Trans. Parallel Distributed Syst.1
1997 Design of Scalable and Multicast Capable Cut-Through Switches for High-Speed LANs
abstract
High-speed switches play an important role in building switched LANs. Among different techniques used in switch design, cut-through switching promises short latency delivery and thus is well suited to distributed/parallel applications. The back pressure flow control of cut-through switching also prevents packet loss due to buffer overflow. This paper presents an incremental switch design based on modular building blocks using cut-through switching technique. The switch can be either nonblocking with full configuration and deterministic routing, or blocking but having more flexibility in configuration and fault tolerance. A kind of switch configuration that fits the client/server computing paradigm is presented. Simulation results are given for various switch configurations and traffic loads. The switch also has built-in hardware multicast capability. Issues of physical layout and integration into practical LANs are also discussed.
Mingyao Yang, Lionel M. Ni
ICPP1