Distributed generation in power systems is currently attracting significant attention as a means to reduce energy generation costs through the exploitation of low-cost decentralized sources. Cost reduction becomes especially relevant when a large portion of the energy supplied by a centralized generator is replaced by energy from a few high-power distributed sources. However, the effectiveness and safety of this approach critically depend on the proper allocation of distributed generators. To this end, this paper presents a novel sensitivity analysis for system losses that highlights the nonlinear dependencies on power-injecting sources. It is shown that the parameters of the nonlinear model allow easy identification of a small subset of grid buses that are suitable candidates for large-power injection. At these buses, source sizing can be determined using standard optimal power flow techniques that minimize the energy cost function. The proposed allocation strategy is validated on the IEEE 69 and 85 benchmark bus grids, and its robustness is further confirmed through simulations that account for stochastic load fluctuations. Comparison with state of the art and robust source allocation approaches, such as the Iterative Search Method, shows that for similar accuracy the proposed method is two/three orders of magnitude faster.

Road accidents are a major cause of death in urban areas. Cooperative Intelligent Transport Systems may mitigate or prevent road accidents by providing drivers with relevant and timely warnings, thanks to V2X communications. However, this requires fast detection of dangers, performed at the edge, to minimize transmission latencies and ensure the timeliness of the warnings. The PMDI project extends the STEP platform for intelligent mobility to support real-time operations and ETSI message generation, and provides integration with mobile and embedded systems.

ASTRAEUS project aims to improve the use of Commercial-Off-The-Shelf (COTS) devices in space telecommunication applications. The goal is to develop specialized radiation mitigation techniques for both hardware and software components with a special focus on the latter. The aim is to demonstrate the feasibility and reliability of these techniques, enabling their future use in telecommunication payload processing units. The SIHFT (Software Implemented Hardware Fault Tolerance) approach will be enforced, where some proper modification to a conventional compilation toolchain, will make possible the identification of temporary fault and the adoption of fault tolerant solutions. The successful implementation of this project will de-risk the use of software-based radiation mitigation techniques and foster the adoption of high-performance while cost-effective COTS electronics in space applications.

The increasing prevalence of Electric Vehicles (EVs) presents challenges in seamlessly integrating EV chargers. This article introduces an enhanced economic model predictive control strategy to address these challenges and alleviate grid congestion caused by EV energy demand. The approach is developed to operate with actual charging station infrastructures and tackles critical issues, including EV supply equipment management, defining charging profiles based on owner preferences, minimizing operational costs, and reducing peak power. It adeptly manages the standard for charger pilot signals and the non-ideal behavior of EV batteries across multiple vehicle types. Through simulations utilizing a comprehensive dataset, the strategy optimizes charging profiles, effectively reducing peak power and achieving cost savings across EV chargers. The study encompasses single charger responses to station-wide evaluations, showcasing the strategy’s applicability and superiority over uncoordinated approaches. This proposed approach, accounting for real-world factors like energy prices and grid demand, establishes itself as an optimal EV charging station operation tool.

The distribution system is highly penetrating with the Electric Vehicle charging stations for increasing Electric Vehicle demand for a sustainable future. The impact of this large-scale integration into the distribution network at a medium voltage level has to be analyzed before dealing with the optimization problem of Electric Vehicles. This article elucidates the modeling of Electric Vehicle charging behavior using a measurement dataset whose aggregation integrated into the medium voltage network is analyzed to study their impact on the power network using probabilistic load flow simulation. The medium voltage network selected is the 69 bus test network to which Electric Vehicle aggregation is imposed as PQ load, and the voltage distribution and the voltage unbalance factor for such integration are discussed in the article at three different time windows i.e., morning, midday and evening.

Wave Digital Filters (WDFs) turn circuits into networks of input-output relationships that can be computed in an explicit fashion. This is done through a linear port-wise mapping of Kirchhoff variables into pairs of incident-reflected waves introducing one scalar free parameter per port, called reference port resistance. Parameters are then used to eliminate the implicit equations relating wave variables, referred to as delay-free-loops. Unfortunately, this methodology can only be applied under strong linearity and topological conditions. This manuscript presents an extension of the WDF formalism involving a novel “cross-port” vector definition of waves, whose reference resistance is a matrix of free parameters. This generalization greatly simplifies the WDF implementation of circuits with two-port elements, such as operational amplifiers. It allows us to derive wave-based descriptions of elements such as nullors, for which no scattering relation is available in the literature. Moreover, it enables a full adaptation of a wide class of two-port elements, thus avoiding the delay-free-loops that would otherwise form in traditional WDFs. This new formalism allows us to implement a wider range of circuits with two-port elements in a modular fashion, since the topology and the elements can be modeled independently.

There is a growing interest in Virtual Analog modeling algorithms for musical audio processing designed in the Wave Digital (WD) domain. Such algorithms typically employ a discretization strategy based on the trapezoidal rule with fixed sampling step, though this is not the only option. In fact, alternative discretization strategies (possibly with an adaptive sampling step) can be quite advantageous, particularly when dealing with nonlinear systems characterized by stiff equations. In this paper, we propose a unified approach for modeling capacitors and inductors in the WD domain using generic linear multi-step discretization methods with variable time-step size, and provide generalized adaptation conditions. We also show that the proposed approach for implementing dynamic (energy-storing) elements in the WD domain is particularly suitable to be combined with a recently developed technique for efficiently solving a class of circuits with multiple one-port nonlinearities, called Scattering Iterative Method. Finally, as examples of application, we develop WD models for a Van Der Pol oscillator and a dynamic diode-based ring modulator, which use different discretization methods.

This research investigates the effects that electrical mismatches and partial shading can have on the performance of photovoltaic arrays. The analysis adopts a probabilistic point of view where the most relevant parameters of the solar units are seen as random variables. The analysis relies on an efficient and robust simulation technique, based on Wave Digital principles, that is tailored to the modular topology of solar arrays. It is shown how electrical mismatch, solar shading and array topology can interact among them in a quite complex way.

This paper shows how arrays of coupled resonant oscillators can provide wildly disordered phase responses corresponding to nonsynchronized regimes. The unpredictability of their time response makes oscillator arrays attractive randomness sources for cryptographic applications. We describe a possible implementation of a random number generator (RNG) combining the proposed randomness source with a few low cost elements needed for bit stream generation. Several bit stream sequences are simulated with a numerically efficient phase-domain model able to include oscillator phase noise and parameters variability. The randomness of the generated bit streams are checked with the tests provided by the National Institute of Standards and Technology. Our results show that the statistical properties of the proposed RNG are indeed resilient to temperature-induced thermal noise variations as well as to the statistical uncertainty of oscillating frequencies and coupling strengths.

This paper presents an effective approach to variability analysis of integrated capacitors due to manufacturing process uncertainty. The proposed approach combines the generalized polynomial chaos method for uncertainty quantification with the efficient floating random walk algorithm for capacitance extraction. For applications where detailed statistical descriptions are required, the method allows achieving a 1000× acceleration compared to standard Monte Carlo analysis. Application to variability analysis in digital to analog converters is illustrated.

An array of weakly coupled oscillators can generate multiphase signals, i.e., multiple sinusoidal signals with specific phase separations. Multiphase oscillators are attractive solutions in many electronic applications such as the synchronization of multiple processing units in digital electronics and the frequency synthesis in mixed-signal radio frequency circuits. Due to the complexity of multiphase oscillators and the large number of design parameters, novel simulation techniques are highly desired to efficiently handle such large-scale problems. In this paper, an efficient phase-domain simulation technique is proposed to calculate the phase response of inductance capacitance oscillator array. By some practical examples, it is shown how the proposed method can be exploited to identify the array topologies and parameter settings that guarantee stable phase separations. It is also shown how the proposed technique can be used to evaluate phase-noise performance.

Digital phase-locked loops based on bang-bang phase detectors are attractive candidates for frequency synthesizers and clock multipliers because of their simplicity and low power consumption. However, being nonlinear systems, they are proved difficult to analyze and prone to the generation of limit cycles. Under the presence of phase noise originating from the controlled oscillator with 1/f2and 1/f3spectral shapes, simple expressions of the output jitter as a function of the loop parameters are developed which allow us to avoid limit cycles and to optimize the design to minimize output jitter.

This paper provides an original and very efficient computational method to evaluate phase-noise effects in injection-locked frequency dividers. The technique relies on a realistic phase-domain macromodel of the locked oscillator whose parameters are extracted by means of an RF circuit simulator.

This paper describes a simulation method to compute oscillator phase noise which combines transient and periodic-transfer-function analyses, available in most of the commercial circuit simulators. The proposed calculation technique is simple to implement and provides the designer a deep insight into phase noise generation mechanisms for both stationary and cyclostationary sources, thus resulting a powerful tool to perform an optimum design in RF applications.

This paper describes an original computational procedure to extract the perturbation projection vector of oscillators by means of a frequency domain technique. A key feature of the method is that it relies on the periodic transfer function analysis, which is available in most circuit simulators, and thus it can easily be exploited by oscillator designers. The accuracy of the proposed extraction procedure is verified for two relevant oscillator topologies.

This paper describes an original simulation-based method to derive the stochastic properties of the output noise of switched-capacitor circuits which are used in sampled-data converters. The method relies on a linear time-varying approximation of the large-signal transient response of the switched circuits. It is shown how switched-capacitor-circuit noise and quantization noise, due to the presence of harsh comparators, can be analyzed in a unified frame where the data converter is modeled as a discrete-time system.

This letter proposes a phase-noise analysis of injection-locked frequency dividers that are based on LC oscillators. The proposed analysis method relies on the concept of the perturbation projection vector and allows one to investigate how the output phase noise is affected by the amplitude and the frequency of the input signal. Closed-form expressions for the output phase-noise spectrum under different injection conditions are provided and validated against the periodic noise analysis of a commercial circuit simulator. Indeed, the proposed semianalytical method can provide insights and guidelines to improve the circuit design.

This paper presents an original phase-domain analysis of the diffusion process which occurs in oscillators due to small-signal white and colored-noise sources. It is shown that the proposed analysis is able to predict correctly the oscillator's power spectrum also very closely to the fundamental harmonic. The correctness of the analysis is verified through comparisons with commercially available tools.

This work describes an efficient method to estimate and compare the locking range of Injection-Locked-Frequency-Dividers. The method can be exploited during the design phase to explore rapidly how the locking range varies for many possible parameter settings and injection strategies.

This paper describes an original method to compute the synchronization regions of injection-locked oscillators that exhibit a strong nonlinear response, such as relaxation or ring architectures. The proposed method is based on the theory of controllably periodically forced oscillators and is implemented within the frame of the time-domain periodic steady-state analysis. The novel method is able to predict, in an accurate way, the conditions for which the correct frequency division occurs and can identify the transitions to more complex regimes that limit the exploitable synchronization region.

This paper presents a hybrid numerical-analytical approach to evaluate and quantify injection pulling effects in RF oscillators. The method employs the Floquet nu1(t) eigenvector to project the perturbation signal into the phase domain. An original closed-form expression for the frequency shift induced by small-signal harmonic perturbations is derived. It is shown that such closed-form expression accurately predicts frequency shift under weak pulling, quasi-lock, as well as locked conditions. An estimation of the main spectrum components of the pulled response is also derived. The proposed macromodeling approach has the peculiarity to be applicable to any oscillator topology.

This paper describes an efficient technique for simulating the huge and mildly-nonlinear thermal networks modeling thermal dynamics in modern integrated systems. The method exploits a special semi-implicit integration technique that allows avoiding the refactorization of Jacobian matrix over a large number of time steps. In the paper a proper implementation of the method is described.

This paper presents a novel time-domain technique for the steady-state analysis of nonlinear oscillators. The method arises from the employment of a high-order implicit RK formula into the context of the Envelope Following technique. The proposed method is very accurate and efficient and exhibits the key peculiarity to be applicable also to harsh-nonlinear oscillator topologies.

In this paper, two relevant computational aspects related to the design of nonlinear oscillators are considered: sensitivity to electrical parameter variation and sensitivity to small- amplitude injected signals. First, the analysis of the perturbation induced by parameter fluctuation is theoretically investigated, and a set of formal equations is deduced that allows us to correctly decompose amplitude and period variations. Second, the analysis of the perturbation induced by a generic weak signal is considered. This analysis is based on a well-consolidated approach that employs the Floquet eigenvector v1(t) to project perturbation into the phase domain. It is shown that the same system of equations that formalizes the parameter-sensitivity problem can be exploited to calculate the v1(t) projection vector. An efficient and reliable numerical implementation of a formal perturbation analysis is then proposed that allows the oscillator designer to evaluate both parameter sensitivity and signal-injection sensitivity in a homogeneous frame.

A novel approach is proposed for generating parametric compact models of passive linear electrical networks. The resulting method removes the main drawbacks of previous techniques

This paper addresses the accurate time-domain simulation of closed-loop switched circuits. It is known that for such systems, conventional analog simulation can be critical due to the presence of strongly nonlinear switching devices. In order to overcome the drawback, in this paper, an in-depth investigation of the weakness points of analog simulation is first presented. On the basis of the achieved understanding, a novel accurate and efficient simulation technique that combines conventional analog simulation with a suited event-driven management of internally controlled commutations is presented. The proposed method employs a novel algorithm for locating commutation time instants and a regionwise evaluation of critical switching devices. The method is general and can be easily inserted into analog simulator tools

In deep-submicrometer layouts, the determination of the signal delay due to interconnects is a main aspect of the design. Usually, on-chip interconnects are modeled by a distributed resistance-capacitance (RC) line. Key aspects of the interconnect modeling are the extraction of parasitic capacitances and the determination of reduced lumped models suited for electrical simulation. This paper addresses both these aspects. The parasitic capacitance extraction problem of layouts is efficiently carried out by means of the floating random walk (FRW) algorithm. It is shown how the employment of the Monte Carlo integration jointly to an extended version of the FRW algorithm allows to directly synthesize an accurate reduced-order RC equivalent net. The new method can deal with very complex geometries in an efficient way and needs neither fracturing of the original layout into subregions nor discretization of interconnects.