A top-down circuits course introduces students to electronic circuit design, teaching the formulation, evaluation and implementation of design objectives and solutions. Course topics include analog and digital signals and circuits, conversion, sensors, and energy storage and are introduced on the basis of concrete design examples. A comprehensive design project and custom PCB design expose students to physical aspects of design. The syllabus emphasizes topics of critical importance such power dissipation limits and is relation to technology and Moore's Law, relegating topics such as semiconductor device operation to follow-up elective courses.

Leveraging conventional microsystems technology, MEMS has become the technology of choice for a wide range of applications including inertial sensors for automotive, games, and consumer applications, projection displays or inkjet print heads. In support of recent efforts to shrink dimensions to the nanoscale, MEMS has established itself as a perfect technology for interaction with the nanoworld. We will describe initial results using MEMS to manipulate single molecules for medical diagnostics. This technology has the potential to turn complex laboratory procedures into procedures that are as simple as taking the temperature.

A training algorithm that maximizes the margin between the training patterns and the decision boundary is presented. The technique is applicable to a wide variety of the classification functions, including Perceptrons, polynomials, and Radial Basis Functions. The effective number of parameters is adjusted automatically to match the complexity of the problem. The solution is expressed as a linear combination of supporting patterns. These are the subset of training patterns that are closest to the decision boundary. Bounds on the generalization performance based on the leave-one-out method and the VC-dimension are given. Experimental results on optical character recognition problems demonstrate the good generalization obtained when compared with other learning algorithms.

Achieving good performance in statistical pattern recognition requires matching the capacity of the classifier to the amount of training data. If the classifier has too many adjustable parameters (large capacity), it is likely to learn the training data without difficulty, but will probably not generalize properly to patterns that do not belong to the training set. Conversely, if the capacity of the classifier is not large enough, it might not be able to learn the task at all. In between, there is an optimal classifier capacity which ensures the best expected generalization for a given amount of training data. The method of structural risk minimization (SRM) refers to tuning the capacity of the classifier to the available amount of training data. This paper illustrates the method of SRM with several examples of algorithms. Experiments confirm theoretical predictions of performance improvement in application to handwritten digit recognition.>

A neural network with 136000 connections for recognition of handwritten digits has been implemented using a mixed analog/digital neural network chip. The neural network chip is capable of processing 1000 characters/s. The recognition system has essentially the same rate (5%) as a simulation of the network with 32-b floating-point precision.

An application of back-propagation networks to handwritten zip code recognition is presented. Minimal preprocessing of the data is required, but the architecture of the network is highly constrained and specifically designed for the task. The input of the network consists of size-normalized images of isolated digits. The performance on zip code digits provided by the US Postal Service is 92% recognition, 1% substitution, and 7% rejects. Structured neural networks can be viewed as statistical methods with structure which bridge the gap between purely statistical and purely structural methods.>

Hardware architectures for character recognition are discussed, and choices for possible circuits are outlined. An advanced (and working) reconfigurable neural-net chip that mixes analog and digital processing is described. It is found that different approaches to image recognition often lead to neural-net architectures that have limited connectivity and repeated use of the same set of weights. This architecture is ideal for time-multiplexing (a combined parallel-series processing) on hardware systems that would be too small to evaluate the entire network in parallel. To make this process efficient, a chip needs to have shift registers to format the input data and additional registers to store intermediate results. Within this framework, it is possible to design chips that have broad utility, large connection capacity, and high speed. This was demonstrated by a new chip with 32000 reconfigurable connections

The ability of learning networks to generalize can be greatly enhanced by providing constraints from the task domain. This paper demonstrates how such constraints can be integrated into a backpropagation network through the architecture of the network. This approach has been successfully applied to the recognition of handwritten zip code digits provided by the U.S. Postal Service. A single network learns the entire recognition operation, going from the normalized image of the character to the final classification.

Quantities such as peak error and integral or differential nonlinearity are commonly used to characterize the performance of analog-to-digital converters. However, these measures are not readily applicable to converter architectures that use feedback and oversampling. An alternative set of parameters for characterizing the linear, nonlinear, and statistical properties of analog-to-digital (A/D) converters is suggested, and an algorithm, referred to as the sinusoidal minimum error method is proposed to estimate the values of these parameters. The suggested approach is equally suited to examining the performance of A/D converters by means or either computer simulations of experimental measurements on actual circuits.>