Recent efforts in open-source GPU research are opening new avenues in a domain that has long been tightly coupled with a few commercial vendors. Emerging open GPU architectures define SIMT functionality through their own ISAs, but executing existing GPU programs and optimizing performance on these ISAs relies on a compiler framework that is technically complex and often undercounted in open-hardware development costs.

Field-Programmable Gate Arrays (FPGAs) have been extensively employed to accelerate parallel applications by allowing designers to customize their hardware for maximum performance. However, most FPGA-based designs are constrained to specific kernels, limiting their suitability across diverse workloads. As GPU workloads grow in complexity and their requirements diverge, softcore GPU(SoftGPU) designs have emerged to exploit FPGA reconfigurability for accelerating a broader range of parallel applications. Despite their potential, these designs have seen limited adoption due to the lack of comprehensive software stack support. In a CUDA-dominated development landscape, translating CUDA source code to alternative programming models can be challenging and often lacks direct feature parity. This paper introduces SoftCUDA, a novel framework that delivers comprehensive, end-to-end CUDA support on our SoftGPU, Vortex. By fully leveraging the reconfigurable architecture of SoftGPU and maintaining a user-friendly CUDA interface, SoftCUDA enables seamless integration and execution of unmodified CUDA applications on FPGA-based platforms.

Thanks to their scalable parallel processing capability, GPUs are promising computing resources for graph processing, in which identical operations are applied to a large number of edges and vertices. However, the sparsity and skewness of real-world graphs cause imbalanced workloads across GPU threads within the same warp, thus impeding efficient processing on the GPU. To mitigate this workload imbalance problem, existing works propose workload balancing hardware and software schemes. However, these solutions often suffer from additional memory overhead or increased computations and communication overheads during inter-warp and intra-warp synchronization. This work proposes a new hardware-software collaborative graph processing framework, SparseWeaver, that converts sparse operations in graph processing into dense operations using graph topology and makes the workloads balanced across GPU threads. Based on the analysis of common patterns in software schemes, we propose Weaver, a new lightweight GPU functional unit microarchitecture that fully leverages the benefits of the GPU architecture and exploits memory access locality. We prototype SparseWeaver on the open-source RISC-V Vortex GPU and demonstrate 2.36 times faster execution time compared to state-of-the-art schemes while incurring a low area overhead of 0.045% from increased dedicated logic registers.