This paper presents a verification methodology for configurable processor cores. The simulation-based approach uses directed diagnostics and pseudo-random program generators both of which are tailored to specific processor instances. A configurable and extensible test-bench serves as the framework for the verification process and offers components necessary for the complete SOC verification. Coverage analysis provides an evaluation of how well a specific design has been exercised, of the breadth of the configuration space explored, and suggests improvements to the process. The results of the analysis show that our methodology achieves good verification coverage of the processor implementation.

A collection of code generation tools which assist designers in the functional verification of high performance microprocessors is presented.These tools produce interesting test cases by using a variety of code generation methods including heuristic algorithms, constraint-solving systems, user-provided templates, and pseudorandom selection.Run-time analysis and characterization of the generated programs provide an evaluation of their effectiveness in verifying a microprocessor design, and suggest improvements to the code generation process.An environment combining the code generation tools with the analysis tools has been developed, and it has provided excellent functional coverage for several generations of high-performance microprocessors.