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Debaprosad Dutt

dblp:39/206 · DBLP profile ↗
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4ranked-venue papers
1as first author
0since 2021 · last 1995
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Electronic design automation · 100%
Theoretical computer science
2 papers
Mathematical optimization · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
physical design
0.031995
A cell-based hierarchical pitchmatching compaction using minimal LP · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995
Cell-Based Hierarchical Pitchmatching Compaction Using Minimal LP · DAC 1993
On Minimal Closure Constraint Generation for Symbolic Cell Assembly · DAC 1991
Electronic design automation › physical design › layout compaction
hierarchical compaction
0.021995
A cell-based hierarchical pitchmatching compaction using minimal LP · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995
Cell-Based Hierarchical Pitchmatching Compaction Using Minimal LP · DAC 1993
Electronic design automation › physical design
layout compaction
0.021995
A cell-based hierarchical pitchmatching compaction using minimal LP · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995
Cell-Based Hierarchical Pitchmatching Compaction Using Minimal LP · DAC 1993
Mathematical optimization
linear programming
0.021995
A cell-based hierarchical pitchmatching compaction using minimal LP · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995
Cell-Based Hierarchical Pitchmatching Compaction Using Minimal LP · DAC 1993

Methods — techniques the papers use, named apart from their topics

linear programming · 0.0slicing structure decomposition · 0.0deferred-merge embedding · 0.0constraint generation · 0.0
YearPublicationVenuePosition
1995 A cell-based hierarchical pitchmatching compaction using minimal LP
abstract
We describe a new linear programming (LP)-based hierarchical pitchmatching method. With a simplified treatment of the intercell constraints, the size of the LP problems is significantly reduced as compared to the best known results. In particular, the pitchmatching problem is decomposed into independent subproblems by exploiting the layout slicing structure. Each subproblem is further "folded" to reduce the LP problem size. We prove that the new method generates smaller LP problem than the previously best known approach. Experimental data show that the LP problem size can be 10 times smaller.>
So-Zen Yao, Chung-Kuan Cheng, Debaprosad Dutt, Surendra Nahar, Chi-Yuan Lo
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
1993 Cell-Based Hierarchical Pitchmatching Compaction Using Minimal LP
abstract
We describe a new linear programming (LP)-based hierarchical pitchmatching method.Whh a simplified treatment of the intercell constraints, the size of the LP problems is significantly smaller than the best known methods.In particular, the pitchmatching problem is decomposed into independent subproblems by the natural slicing structure in layout.Each subproblem is folded further to reduce the LP problem size.Experiments show that the LP problem size can be 10 times smaller than the best known result.
So-Zen Yao, Chung-Kuan Cheng, Debaprosad Dutt, Surendra Nahar, Chi-Yuan Lo
DAC3
1991 On Minimal Closure Constraint Generation for Symbolic Cell Assembly
abstract
Article On minimal closure constraint generation for symbolic cell assembly Share on Authors: Debaprosad Dutt AT&T Bell Laboratories, 1247 South Cedar Crest Blvd., Allentown, PA AT&T Bell Laboratories, 1247 South Cedar Crest Blvd., Allentown, PAView Profile , Chi-Yuan Lo AT&T Bell Laboratories, 600 Mountain Avenue, Murray Hill, NJ AT&T Bell Laboratories, 600 Mountain Avenue, Murray Hill, NJView Profile Authors Info & Claims DAC '91: Proceedings of the 28th ACM/IEEE Design Automation ConferenceJune 1991 Pages 736–739https://doi.org/10.1145/127601.127761Online:01 June 1991Publication History 6citation150DownloadsMetricsTotal Citations6Total Downloads150Last 12 Months2Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access
Debaprosad Dutt, Chi-Yuan Lo
DAC1
1989 A data model and architecture for VLSI/CAD databases
abstract
A design data manager is emerging as an important component of an integrated CAD system. The authors present a semantic data model and an architecture for VLSI/CAD databases. The data model provides mechanisms to represent the design entities the relationships among them in a unified way. A key feature of the system architecture is that it exploits design hierarchy to provide high performance. A data manager based on this model has been implemented and used by a set of diverse applications. In conjunction with efficient data flow, the data manager can serve to improve software productivity.>
Anoop Singhal, Nishit P. Parikh, Debaprosad Dutt, Chi-Yuan Lo
ICCAD3