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Stuart K. Tewksbury

dblp:39/2899 · DBLP profile ↗
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6ranked-venue papers
3as first author
0since 2021 · last 1997
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 2 first-authorComputer networks · 3 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Interconnection networks and networks-on-chip · 36% High-performance computing · 18% Reconfigurable computing and FPGAs · 18%
Computer networks
1 paper
Physical-layer communications · 100%

Topics — the 6 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Reconfigurable computing and FPGAs › FPGA-based signal processing
adaptive filtering
0.011983
Multiprocessor Implementation of Adaptive Digital Filters · IEEE Trans. Commun. 1983
Processor architecture and microarchitecture
multiprocessor architecture
0.011983
Multiprocessor Implementation of Adaptive Digital Filters · IEEE Trans. Commun. 1983
High-performance computing › parallel numerical algorithms
parallel signal processing
0.011983
Multiprocessor Implementation of Adaptive Digital Filters · IEEE Trans. Commun. 1983
Physical-layer communications
equalization
0.011983
Multiprocessor Implementation of Adaptive Digital Filters · IEEE Trans. Commun. 1983
Integrated circuit design › analog and mixed-signal circuits › data converters
analog-to-digital converter
0.011974
Linear Delta Modulator Integrated Circuit with 17-Mbit/s Sampling Rate · IEEE Trans. Commun. 1974
Integrated circuit design
bipolar integrated circuit
0.011974
Linear Delta Modulator Integrated Circuit with 17-Mbit/s Sampling Rate · IEEE Trans. Commun. 1974

Methods — techniques the papers use, named apart from their topics

recursive least squares · 0.0lattice filter · 0.0LMS algorithm · 0.0wafer-scale integration · 0.0
YearPublicationVenuePosition
1997 Guest Editorial Foreword to the Special Section on WSI'95
Stuart K. Tewksbury, Glenn H. Chapman
IEEE Trans. Very Large Scale Integr. Syst.1
1993 Toward Cointegration of Optical Interconnections within Silicon Microelectronic Systems
Stuart K. Tewksbury, Lawrence A. Hornak, H. E. Nariman, S. M. Langsjoen, N. J. Hall, J. J. Hall, S. P. Mcginnis
J. Parallel Distributed Comput.1
1988 Potential applications of high-Tc superconducting transmission lines in integrated systems
abstract
Simple models and formulas characterizing pulse propagation over superconducting microstrip transmission lines are summarized. The models consider the phase velocity and attenuation coefficient of high-T/sub c/ superconducting microstrip lines. Two examples, one involving a high-bandwidth interconnect bus for a time-multiplexed fine-grained multiprocessor, and the other an electrical time-delay element in the femtosecond regime, are presented.>
Mehdi Hatamian, Lawrence A. Hornak, Stuart K. Tewksbury
ICCD3
1988 Communication network issues and high-density interconnects in large-scale distributed computing systems
abstract
The authors discuss the impact of the physical interconnection environment through which the concurrent processes among locally distinct computing nodes of large-scale multicomputer systems are coupled. The communication capabilities implied for massively parallel computing systems by fine-grain task partitioning and by fine-grained communications are discussed in detail. Wafer-scale and hybrid wafer-scale system technologies which would support such communications are described.>
Stuart K. Tewksbury, Lawrence A. Hornak
IEEE J. Sel. Areas Commun.1
1983 Multiprocessor Implementation of Adaptive Digital Filters
abstract
Adaptive filters, employing the transversal filter structure and the least mean square (LMS) adaptation algorithm, or its variations, have found wide application in data transmission equalization, echo cancellation, prediction, spectral estimation, on-line system identification, and antenna arrays. Recently, in response to requirements of fast start-up, or fast tracking of temporal variations, fast recursive least squares (FRLS) adaptation algorithms for both transversal and lattice filter structures have been proposed. These algorithms offer faster convergence than is possible with the LMS/ transversal adaptive filters, at the price of a five-to-tenfold increase in the number of multiplications, divisions, and additions. Here we discuss architectures and implementations of the LMS/transversal, fast-converging FRLS filter, and lattice filter algorithms which minimize the required hardware speed. We show how each of these algorithms can be partitioned so as to be realizable with an architecture based on multiple parallel processors.
Victor B. Lawrence, Stuart K. Tewksbury
IEEE Trans. Commun.2
1974 Linear Delta Modulator Integrated Circuit with 17-Mbit/s Sampling Rate
abstract
Delta modulation (DM) is an attractive method of analog-to-digital (A/D) conversion in applications where simple and economical designs must be realized without sacrificing conversion quality. This paper describes a new single-chip, bipolar integrated circuit delta modulator that maintains a high conversion resolution over a wide range of sampling frequencies and ambient conditions. Its high-speed operation (maximum sampling rates greater than 15 Mbit/s) is achieved with lower power requirements than with comparable discrete realizations. Low sensitivities to power supply and ambient temperature variations, achieved with a novel logic design, make this circuit useful in a telephone switching office environment and as a buildlng block for other linear and companded analog-to-PCM converters.
Gary L. Baldwin, Stuart K. Tewksbury
IEEE Trans. Commun.2