Juechu Dong

dblp:390/7634 · DBLP profile ↗
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2ranked-venue papers
1as first author
2since 2021 · last 2026
0000-0002-8855-9962ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author · 2 since 2021Software engineering, systems software and programming languages · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Memory systems · 70% GPUs and heterogeneous computing · 30%
Artificial intelligence
1 paper
Efficient and distributed learning · 100%
Network and information security
1 paper
Hardware security and side channels · 50% Authentication and access control · 50%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Machine learning › Efficient and distributed learning › inference efficiency
inference optimization
1.012026
Accelerating Block Low-Rank Foundation Model Inference on Memory-Constrained GPUs · HPDC 2026
Machine learning › Efficient and distributed learning › inference efficiency
memory-efficient inference
1.012026
Accelerating Block Low-Rank Foundation Model Inference on Memory-Constrained GPUs · HPDC 2026
GPUs and heterogeneous computing
GPU memory management
1.012026
Accelerating Block Low-Rank Foundation Model Inference on Memory-Constrained GPUs · HPDC 2026
Memory systems › processing-in-memory
intelligent memory
0.812024
Toleo: Scaling Freshness to Tera-scale Memory Using CXL and PIM · ASPLOS (4) 2024
Memory systems › secure memory
memory integrity
0.812024
Toleo: Scaling Freshness to Tera-scale Memory Using CXL and PIM · ASPLOS (4) 2024
Memory systems
processing-in-memory
0.812024
Toleo: Scaling Freshness to Tera-scale Memory Using CXL and PIM · ASPLOS (4) 2024
Authentication and access control
replay attack prevention
0.212024
Toleo: Scaling Freshness to Tera-scale Memory Using CXL and PIM · ASPLOS (4) 2024
Hardware security and side channels
trusted execution environments
0.212024
Toleo: Scaling Freshness to Tera-scale Memory Using CXL and PIM · ASPLOS (4) 2024

Methods — techniques the papers use, named apart from their topics

foundation model inference · 2.0block low-rank approximation · 2.0merkle tree · 1.5CXL · 1.5version numbers · 0.8version number · 0.8
YearPublicationVenuePosition
2026 Accelerating Block Low-Rank Foundation Model Inference on Memory-Constrained GPUs
Pierre Abillama, Changwoo Lee 0001, Juechu Dong, David T. Blaauw, Dennis Sylvester, Hun-Seok Kim
HPDC3
2024 Toleo: Scaling Freshness to Tera-scale Memory Using CXL and PIM
abstract
Trusted hardware's freshness guarantee ensures that an adversary cannot replay an old value in response to a memory read request. They rely on maintaining a version number for each cache block and ensuring their integrity using a Merkle tree. However, these existing solutions protect only a small amount of main memory (few MBs), as the extraneous memory accesses to the Merkle tree increase prohibitively with the protected memory size. We present Toleo, which uses trusted smart memory connected through a secure CXL IDE network to safely store version numbers. Toleo eliminates the need for an unscalable Merkle tree to protect the integrity of version numbers by instead using smart memory as the root of trust. Additionally, Toleo ensures version confidentiality which enables stealth versions that reduce the version storage overhead in half.
Juechu Dong, Jonah Rosenblum, Satish Narayanasamy
ASPLOS (4)1