Delivering instruction exceptions to user-space code enables a range of services, including floating point tracing and virtualization. Unfortunately, the usual forms of such delivery, signals or even specialized kernel modules, have high latency and overhead. We propose kernel-bypass exceptions (KBEs), hardware support to deliver certain exceptions safely and directly to user-space handlers. We then describe RAFT-V, a proof-of-concept, open-source prototype that extends the SonicBOOM RISC-V core and Linux to implement KBEs. RAFT-V also implements floating point trap support, which was not previously available on RISC-V in any form. RAFT-V lowers the latency and overhead of delivering these and other instruction exceptions to a user-space handler by 30× compared to signals. We use this functionality in RISC-V ports of the open-source FPSpy and FPVM floating point tracing and virtualization tools, reducing their costs by a factor of 3×. Our changes to add KBE and floating point trap features to RISC-V only marginally increase the overall hardware footprint and do not affect its critical path.