Demo Data from EDBT 2026 / reviewers in the wild / expert
Qinglin Pan
dblp:394/5408
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2026
0009-0006-0667-1552ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 77% Parallel and multicore computing · 23% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Compilers and program optimization
binary rewriting |
1.0 | 1 | 2026 | Chimera: Transparent and High-Performance ISAX Heterogeneous Computing via Binary Rewriting · EuroSys 2026 |
Processor architecture and microarchitecture
instruction set architecture |
1.0 | 1 | 2026 | Chimera: Transparent and High-Performance ISAX Heterogeneous Computing via Binary Rewriting · EuroSys 2026 |
Parallel and multicore computing › parallel scheduling
heterogeneous multiprocessor scheduling |
0.3 | 1 | 2026 | Chimera: Transparent and High-Performance ISAX Heterogeneous Computing via Binary Rewriting · EuroSys 2026 |
Methods — techniques the papers use, named apart from their topics
binary translation · 2.0binary rewriting · 2.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Chimera: Transparent and High-Performance ISAX Heterogeneous Computing via Binary RewritingabstractISAX heterogeneous processors integrate cores that share a common base ISA, with certain cores offering extension ISAs (e.g., vector extension) to accelerate computation. ISAX balances performance and energy efficiency while facilitating the reuse of existing software ecosystems. RISC-V, which adopts the ISAX architecture, has gained extensive attention in both industry and academia. Binary translation via binary rewriting enables transparent ISAX heterogeneous computing by translating extension instructions when migrating a program to cores without extension support. However, current binary rewriting methods still struggle to achieve both high performance and correctness. Jiatai He, Qinglin Pan, Ruilin Zhao, Ji Qi 0002, Kaiwen Liang, Yuexiang Wang, Jiageng Yu |
EuroSys | 2 |