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Biliang Lai

dblp:398/2669 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2025
0009-0002-6975-2924ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 65% Storage systems · 35%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › hybrid memory
hybrid memory management
0.912025
NStore: A High-Performance NUMA-Aware Key-Value Store for Hybrid Memory · IEEE Trans. Computers 2025
Storage systems
key-value storage
0.912025
NStore: A High-Performance NUMA-Aware Key-Value Store for Hybrid Memory · IEEE Trans. Computers 2025
Memory systems
non-volatile memory
0.912025
NStore: A High-Performance NUMA-Aware Key-Value Store for Hybrid Memory · IEEE Trans. Computers 2025
Memory systems › non-volatile memory
persistent memory
0.912025
NStore: A High-Performance NUMA-Aware Key-Value Store for Hybrid Memory · IEEE Trans. Computers 2025
Storage systems
crash consistency
0.312025
NStore: A High-Performance NUMA-Aware Key-Value Store for Hybrid Memory · IEEE Trans. Computers 2025
Storage systems
storage reliability
0.312025
NStore: A High-Performance NUMA-Aware Key-Value Store for Hybrid Memory · IEEE Trans. Computers 2025

Methods — techniques the papers use, named apart from their topics

log-structured storage · 0.9garbage collection · 0.9cache replacement · 0.9
YearPublicationVenuePosition
2025 NStore: A High-Performance NUMA-Aware Key-Value Store for Hybrid Memory
abstract
Emerging persistent memory (PM) promises near-DRAM performance, larger capacity, and data persistence, attracting researchers to design PM-based key-value stores. However, existing PM-based key-value stores lack awareness of the Non-Uniform Memory Access (NUMA) architecture on PM, where accessing PM on remote NUMA sockets is considerably slower than accessing local PM. This NUMA-unawareness results in sub-optimal performance when scaling on NUMA. Although DRAM caching alleviates this issue, existing cache policies ignore the performance disparity between remote and local PM accesses, keeping remote PM access as a performance bottleneck when scaling PM stores on NUMA. Furthermore, creating hot data views in each socket's PM fails to eliminate remote PM writes and, worse, induces additional local PM writes. This paper presents NStore, a high-performance NUMA-aware key-value store for the PM-DRAM hybrid memory. NStore introduces a NUMA-aware cache replacement strategy, called Remote Access First (RAF) cache in DRAM, to minimize remote PM accesses. In addition, NStore deploys Nlog, a write-optimized log-structured persistent storage, purposed to eliminate remote PM writes. NStore further mitigates the NUMA impacts through localized scan operations, efficient garbage collection, and multi-thread recovery for Nlog. Evaluations show that NStore outperforms state-of-the-art PM-based key-value stores, achieving up to 13.9$\times$and 11.2$\times$higher write and read throughput, respectively.
Zhonghua Wang 0001, Kai Lu 0002, Jiguang Wan 0001, Hong Jiang 0001, Zeyang Zhao, Biliang Lai, Guokuan Li, Changsheng Xie 0001
IEEE Trans. Computers7