Demo Data from EDBT 2026 / reviewers in the wild / expert
Tongshu Ding
dblp:398/7119
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2025
0009-0008-3672-2327ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware verification and test › VLSI testing
FPGA interconnect testing |
0.9 | 1 | 2025 | An Efficient Traversal Method for FPGA Interconnect Testing Based on Regular Routing · FPGA 2025 |
Electronic design automation
hardware test |
0.3 | 1 | 2025 | An Efficient Traversal Method for FPGA Interconnect Testing Based on Regular Routing · FPGA 2025 |
Methods — techniques the papers use, named apart from their topics
regular routing · 0.9
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | An Efficient Traversal Method for FPGA Interconnect Testing Based on Regular Routing
Wenwei Chen, XiaoTong Zhao, Tongshu Ding, Jian Wang 0036, Jinmei Lai 0001 |
FPGA | 4 |