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Amir Bahador

dblp:399/0451 · DBLP profile ↗
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1ranked-venue papers
1as first author
1since 2021 · last 2025
0009-0005-4162-7883ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Emerging computing paradigms · 25% Integrated circuit design · 25% Memory systems · 25%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems › non-volatile memory
magnetic tunnel junction
0.912025
Algorithmically Enhanced Design of Spintronic-Based Tunable True Random Number Generator for Dependable Stochastic Computing · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Hardware reliability and fault tolerance › process variation
process variation tolerance
0.912025
Algorithmically Enhanced Design of Spintronic-Based Tunable True Random Number Generator for Dependable Stochastic Computing · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Integrated circuit design › emerging device technologies
spintronic device
0.912025
Algorithmically Enhanced Design of Spintronic-Based Tunable True Random Number Generator for Dependable Stochastic Computing · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Emerging computing paradigms › approximate and stochastic computing
stochastic computing
0.912025
Algorithmically Enhanced Design of Spintronic-Based Tunable True Random Number Generator for Dependable Stochastic Computing · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025

Methods — techniques the papers use, named apart from their topics

probability generation array · 0.9longest common subsequence algorithm · 0.9
YearPublicationVenuePosition
2025 Algorithmically Enhanced Design of Spintronic-Based Tunable True Random Number Generator for Dependable Stochastic Computing
abstract
This article proposes a tunable true random number generator (TTRNG) based on stochastic magnetic tunnel junction (MTJ) switching in the subcritical current regime. The proposed design consists of three parts. The first part is a write/read circuit featuring a static write circuit and an energy-efficient circuit optimized for read operations. The second finds the probability generation array (PGA) similar to the longest common subsequence (LCS) problem. However, the algorithms presented so far for the LCS have not been responsive to finding the Desired-PGA as it must look for the common subsequence among one million sequences, each sequence being 259 long. Hence, the convergence of those algorithms is impossible in this problem. Accordingly, we propose an algorithm to find a common subsequence of length 24, each defining a logic function. We also propose a controller to generate arbitrary probabilities with a zero steady-state error. These parts, especially PGA, make the design highly robust to the process variations. Notably, the proposed design passes the National Institute of Standards and Technology test. The proposed design also reduces energy dissipation compared to previous designs. Also, as it does not require precise sizing, the FinFET technology is appropriately used to design the proposed approach.
Amir Bahador, Mohammad Hossein Moaiyeri, Reza Ghaderi
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1