In this paper we examine the use of a shared memory programming model to address the problem of portability of application codes between distributed memory and shared memory architectures. We do this with an extension of the Parallel C Preprocessor. The extension, borrowed from Split-C and AC, uses type qualifiers instead of storage class modifiers to declare variables that are shared among processors. The type qualifier declaration supports an abstract shared memory facility on distributed memory machines while making direct use of hardware support on shared memory architectures.Our benchmarking study spans a wide range of shared memory and distributed memory platforms. Benchmarks include Gaussian elimination with backsubstitution, a two-dimensional fast Fourier transform, and a matrix-matrix multiply. We find that the type-qualifier-based shared memory programming model is capable of efficiently spanning both distributed memory and shared memory architectures. Although the resulting shared memory programming model is portable, it does not remove the need to arrange for overlapped or blocked remote memory references on platforms that require these tuning measures in order to obtain good performance.

We present a strudy that accentuates the performance and scalability aspects of directory-based cache coherence in multiprocessor systems.

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A panel session on the role of computational clusters is presented. Attention is given to experiences with cluster computing at Lawrence Livermore National Laboratory, and to experience with cluster computing at Fermilab.>

We present detailed experimental work involving a commercially available large scale shared memory MIMD paraliel computer having a software controlled cache coherence mechanism.The implementation of a scalable MIMD computer with hardwarecontrolled coherent shared hierarchical memory is indeed a formidable task and has yet to be effectively implemented.We present some techniques used to ezploit our multiprocessor (the BBN TC.2000) on a network simulation program, showing -the resulting performance gains and the associated programming costs.We show that an eficient implementation relies heavily on the user's ability to explicitly manage the memory system, which is typically handled by hardware support on other shared memory multiprocessors.