In-Vehicle networks such as the Controller Area Network (CAN) are highly vulnerable to cyberattacks due to the absence of encryption and authentication mechanisms. Intrusion detection systems (IDSs) have therefore become a critical line of defense. Among them, graph-based IDSs that model message sequences as graphs have attracted attention for their effectiveness against attacks that disrupt communication structures. However, replication experiments show that a representative method, GDTIDS, performs poorly against masquerade attacks, which preserve structural properties while manipulating payload contentsTo address this limitation, we propose a new feature, the outlier ratio, which incorporates payload-level information into the IDS. We define three variants of the feature based on value range, Hamming distance, and Mahalanobis distance. Evaluations on three publicly available CAN datasets demonstrate that the proposed method, particularly the Mahalanobis-Distance based variant, significantly improves detection of masquerade attacks while maintaining high performance against other attack types.

Vehicle trajectory prediction (VTP) is a prominent research topic in autonomous vehicles (AVs). However, existing studies concentrate on improving prediction accuracy, overlooking how VTP accuracy influences the effectiveness of downstream tasks such as collision avoidance. In this paper, we investigate the relationship between VTP accuracy and key performance indicators (KPIs) of cooperative collision avoidance systems (CCAS) for connected AVs operating at blind intersections. To this end, we propose a generalized error model (GEM) that enables the generation of customizable VTP errors. GEM is integrated into an error injection framework to produce diverse, error-controlled trajectories in real time. Our experiments quantitatively characterize the relationship among VTP accuracy, warning thresholds and strategies, and CCAS KPIs. The results reveal a common pattern: as VTP error increases, CCAS recall improves while precision declines, demonstrating a negative correlation that is difficult to balance. This underscores the need for effective trade-offs between recall and precision in CCAS design. With a general collision warning strategy, CCAS can preemptively report over 90% of collisions, substantially enhancing traffic safety, though at the expense of a reduced precision. To mitigate this, we devise a density-based warning strategy (DCWS) that improves precision across the entire VTP accuracy space while maintaining recall at acceptable levels. Notably, DCWS gradually decouples CCAS KPIs from VTP accuracy performance, highlighting the crucial role of warning strategies. The quantitative results presented in this paper can help practitioners assess the impact of their VTP models on CCAS and select appropriate warning thresholds.

This study aims to explore how to improve the reliability of the next-generation mobility model—Mobility as a Service (MaaS) based on autonomous vehicles, with a particular focus on the system’s resilience to uncertainty. Currently, the application of reliability engineering in the field of smart mobility services is primarily concentrated on technical details, lacking unified standards and methods to enhance the reliability of service levels. This paper attempts to fill this research gap. In this study, we adopt a combined approach of system analysis and optimization algorithms. First, we design a system reliability analysis method by examining the potential discrepancies between the system’s capability to provide mobility services and stakeholder demands. Subsequently, we propose a reinforcement learning-based system service capacity optimization algorithm aimed at enhancing the system’s resilience at the service level to tackle challenges posed by uncertainty. To validate the effectiveness of the proposed method, we conduct a case study on a practical intelligent mobility service framework. Through system simulation, we generate and collect data on system service capacity, demand discrepancies, and uncertainty, as well as stakeholders’ expectations for the MaaS framework evaluation. Case studies and experimental data analysis confirm that the proposed resilience engineering approach effectively identifies potential risks in system service capacity and provides a compromise system resilience engineering solution in the context of conflicting stakeholder demands. To facilitate reproducibility and further research, the core code is available at https://github.com/zzs-code/MaaS-RE-MARL.git.

With the increasing demand for performance, multi-core hardware and RTOSs are being increasingly adopted in embedded systems. These modern embedded systems are exhibiting differentiated features in various aspects, such as hardware architecture and RTOS design. However, traditional benchmark tools struggle to evaluate the performance of multi-core systems effectively. To enable the evaluation of highly diversified multi-core embedded systems, we designed a multi-core specialized benchmark framework that assesses multi-core performance characteristics, including multi-core contention and RTOS design factors, across different target systems. Using this framework, we implemented multi-core benchmarks on three distinct yet representative embedded systems, each with unique characteristics. The evaluation not only allowed us to successfully capture their multi-core performance characteristics, but also helped us identify performance bottlenecks caused by specific design features.

The demand for hazardous materials (HazMat) logistics is on the rise, and the importance of safety engineering of HazMat logistics is clear. Freight services based on intelligent transportation systems (ITS) offer a more secure, efficient, and environmentally-friendly method of HazMat logistics. At the same time, the voice of digital transformation (DX) in logistics continues to grow. However, there are currently some barriers to the digital transformation of the HazMat logistics industry, in which safety is always prioritized. One of the issues is how to promote the use of information technology in the logistics business process in a reasonable and orderly manner, given limited funds and technology, while also ensuring safety and improving the business process. Existing safety analysis methods, such as the Functional Resonance Analysis Method (FRAM) and its quantitative expansion, can be used to identify safety risks and make safety recommendations for business process improvement, but they cannot assist us with the rationale for DX decision making. To close the gap, we present in this article an optimization method of HazMat transportation safety engineering based on FRAM, which will assist HazMat logistics companies in making decisions regarding the implementation of ITS. We use the HazMat transportation of a Japanese logistics company as an example to verify and validate the proposed decision support scheme.

Multiple controller area network (CAN) buses are often integrated in in-vehicle networks to support various functions and control systems. Although the CAN-CAN gateway has a critical role in relaying messages between these buses, it increases the end-to-end (E2E) delay of messages. This study proposes a method for reducing the E2E delay of messages transmitted through a CAN-CAN gateway by changing their CAN IDs. The E2E delay of gateway messages is minimized using a simulated annealing algorithm. An evaluation of the proposed method demonstrates that it can significantly reduce the E2E delay of gateway messages compared to that obtained with methods in which CAN IDs remain unchanged or are randomly altered and a method that uses the Targeted Priority Assignment algorithm.

The importance of methods for detecting anomalies, such as threats to automotive cybersecurity, in the in-vehicle networks has been increasing. Particularly crucial is the detection of hijackings of vehicle electronic control units (ECUs) by attackers. However, methods for detecting anomalies in hijacked ECUs have not been sufficiently developed. Therefore, this study proposes an ECU hijacking detection method that uses a trust model executed by each ECU. The proposed method aims to detect abnormal behavior by having all ECUs monitor each other. This study demonstrated the ability of the proposed method to detect anomalies in hijacked ECUs and their systems.

Time-Sensitive Networking (TSN) realizes high bandwidth and time determinism for data transmission and thus becomes the crucial communication technology in time-critical systems. The Gate Control List (GCL) is used to control the transmission of different classes of traffic in TSN, including Time-Triggered (TT) flows, Audio-Video-Bridging (AVB) flows, and Best-Effort (BE) flows. Most studies focus on optimizing GCL synthesis by reserving the preceding time slots to serve TT flows with the strict delay requirement, but ignore the deadlines of non-TT flows and cause the large delay. Therefore, this paper proposes a comprehensive scheduling method to enhance the real-time scheduling of AVB flows while guaranteeing the time determinism of TT flows. This method first optimizes GCL synthesis to reserve the preceding time slots for AVB flows, and then introduces the Earliest Deadline First (EDF) method to further improve the transmission of AVB flows by considering their deadlines. Moreover, the worst-case delay (WCD) analysis method is proposed to verify the effectiveness of the proposed method. Experimental results show that the proposed method improves the transmission of AVB flows compared to the state-of-the-art methods.

The scale and demand for protection functionalities in embedded systems continue to grow as Internet of things technology develops. Simultaneously, multiprocessor real-time operating systems (RTOSs) with memory protection functionalities are broadening in use. On the other hand, the large development effort and poor reusability of multiprocessor RTOS-based development remain hindrances to their use. To solve this problem, this paper proposes a component framework for multiprocessor RTOSs that includes memory protection. In the proposed framework, OS functionalities are reframed as components. The allocation of objects to processors and protection settings, which are supported by the OS, can then be configured based on the component description. Plugins are implemented here to generate files for object generation from component descriptions of OS functionalities. In addition, access to the protection domain can be defined based on the component description. Finally, test programs are used in a performance evaluation. The proposed framework enables extensions to the component-based OS while maintaining most of the functionality and performance of the target OS.

The CAN FD emerges as a promising CAN technology inside the ACPS due to its advantages of high data-phase bit-rate and message payload. HSM based security solution is recommended by auto industry to protect CAN FD from potential security attacks, but it induces new challenges on timing analysis of CAN FD messages, which is left open in the literature. This article develops the first security-aware system model to describe the processing of CAN FD messages, and presents a new WCRT analysis to bound the interference induced by security-critical messages. We give the theoretical proof that our WCRT analysis can upper bound the response time of CAN FD messages. Using a small message set, we show that the WCRT computed by our new analysis is only 14% percent higher than the true WCRT obtained from an exhaustive search based simulator. By comparing with existing method, the number of impacted messages increases along with the increasing number of security critical messages, and for the two typical CAN FD systems, the percentage of WCRT increase varies from 12.43% to 14.57% and 7.0% to 10.89%, respectively; the percentage of WCRT decrease varies from 3.29% to 6.04% and 4.13% to 7.93%, respectively.

For various reasons, programming languages continue to multiply and evolve. It has become necessary to have a multilingual clone detection tool that can easily expand supported programming languages and detect various code clones is needed. However, research on multilingual code clone detection has not received sufficient attention. In this study, we propose MSCCD (Multilingual Syntactic Code Clone Detector), a grammar pluggable code clone detection tool that uses a parser generator to generate a code block extractor for the target language. The extractor then extracts the semantic code blocks from a parse tree. MSCCD can detect Type-3 clones at various granularities. We evaluated MSCCD's language extensibility by applying MSCCD to 20 modern languages. Sixteen languages were perfectly supported, and the remaining four were provided with the same detection capabilities at the expense of execution time. We evaluated MSCCD's recall by using BigCloneEval and conducted a manual experiment to evaluate precision. MSCCD achieved equivalent detection performance equivalent to state-of-the-art tools.

In recent years, research has been conducted on dynamic map systems, which are information and communication platforms that manage vehicle sensor information and run applications. However, there is a concern about scalability in the dynamic map system, which operates on a cloud on the Internet, when the number of vehicles that transmit and receive sensor information increases. Therefore, it is considered that the application load can be distributed by distributing multiple edge servers geographically and having the information managed in the cloud by the edge servers. However, the edge server that controls the vehicle information and the edge server that receives the data do not always match depending on the actual radio wave conditions. Therefore, some applications are difficult to manage, such as intersection collision danger warning and merging arbitration when edge servers are assigned in the same way as base stations that receive data from vehicles. Such an application should receive all vehicle data for the target road area. Therefore, we divide the area on the road where a vehicle travels as “lane section ID” and assign an edge server to each lane section ID on the basis of that area. In addition, we implemented a dynamic map system that connects vehicles and edge servers by linking multiple edge servers. This enables the edge server to aggregate vehicle data without being affected by radio traffic conditions. We evaluated the scalability of the dynamic map system and verified the effectiveness of the load balancing mechanism using multiple edge servers.

In this paper, we suggest an approach for extracting fine-grained state transition tables using the KLEE symbolic execution engine to assist developers in understanding the behavior of C source code for embedded systems.

The Internet of Things plays an indispensable role in the development of connected vehicles, which will pave the way for road safety applications. In recent years, the concept of a cooperative collision warning system (CCWS) has been introduced and developed to enhance road safety, and it has been seen as a typical Internet-of-Vehicles application. In most CCWSs, it is vital to have a detection mechanism based on trajectory predictions where the uncertainties associated with vehicular state and motion are complex. However, most available approaches in this regard did not consider these uncertainties. Hence, this article proposes a new collision risk assessment (CRA) method where sigma trajectories that include multiple possible trajectories considering multiple aspects of vehicular motion are designed to cope with vehicular uncertainties. Our method is implemented in a novel server-based architecture, which is different from the commonly used vehicle-based controlled CCWSs. The CRA is provided as a service by a cloud server. The proposed method and architecture are validated and evaluated through extensive real-world experiments. Experimental results show that our method outperforms a referenced method in terms of CRA and achieves better robustness in tolerating communication delays and dropouts. Latencies in CRA service were analyzed, and it was found that powerful computing resources provided by cloud servers can significantly decrease computational cost, which will indirectly compensate for communication costs in the future. Based on our high-performance CRA method, the proposed architecture can be regarded as a novel option for CCWS design.

Extensibility is an important optimization objective for the E/E architecture of automotive cyber-physical systems (ACPS), while little attention has paid to the extensibility-aware design of in-vehicle network. To address this problem, this paper formulates a trade-off problem that balances the bandwidth utilization and the extensibility from the initial design of CAN FD. We firstly propose a new extensibility model and the related evaluation metric, and then two optimization algorithms, namely, the mixed integer linear programming (MILP) approach and the simulated annealing (SA) based heuristic approach, are proposed to resolve the trade-off problem for mid-sized and industry sized signal sets, respectively. The experiment results show the efficiency of the proposed extensibility metric and the optimization algorithms. By comparing with state-of-the-art algorithm, the MILP reduces the increase range of the bandwidth utilization of the extended signal set by 18.17% to 57.64% averagely, and 49.22% to 89.40% maximally, with only 0.06% to 0.79% bandwidth utilization overhead; the SA approach can reduces the increase range of the bandwidth utilization of the extended signal set by 12.71% to 58.33% averagely, and 40.08% to 89.40% maximally, with only 0.06% to 0.8% bandwidth utilization overhead.

To realize the optimized design of the automotive cyber-physical system, it is required to consider the interplay between the communication and computation. However, the existing research about the design of the controller area network (CAN) with flexible data rate (CAN FD) ignores this, it only considers the minimization of the bandwidth utilization and neglects the fact that it would trigger too many unnecessary message receiving interrupts (MRIs) on message receiving electronic control units. To address this problem, this article formulates a tradeoff problem that balances the bandwidth utilization and the number of unnecessary MRIs during the design of the CAN FD. We first propose an algorithm to analyze the number of unnecessary MRIs triggered by the packed messages, and then, two heuristic algorithms, namely, the Top-Down approach and the Hybrid approach, are proposed to resolve the tradeoff problem for midsized and large signal sets, respectively. The experiment results show that compared with the state-of-the-art algorithm, the Top-Down approach reduces the unnecessary MRIs by 10.48%-99.89% with only 0.02%-1.32% bandwidth utilization overhead, the Hybrid approach reduces the unnecessary MRIs by 23.15%-99.63% with only 0.13%-2.07% bandwidth utilization overhead.

Numerous examples of automotive vulnerabilities have been provided, and the diagnostic functions in the on-board electronic control unit (ECU) have been used as an avenue of attack and analysis. Many ECUs are equipped with security access services that protect crucial diagnostic functions. If these security access services contain vulnerabilities, however, the ECU may be falsified or improperly controlled through the controller area network. In this study, we analyze the means of attacking security access services and provide the results of evaluating actual ECUs.

We study the worst case response time (WCRT) analysis and evaluation for sporadic message-processing tasks in a multicore automotive gateway of a controller area network (CAN) cluster. We first build a multicore automotive gateway on CAN clusters. Two WCRT analysis methods for message-processing tasks in the multicore gateway are subsequently presented based on global and partitioned scheduling paradigms. We evaluate the WCRT results of two analysis methods with real message sets provided by the automaker, and present the design optimization guide.

A typical automotive integrated architecture is a controller area network (CAN) cluster integrated by a central gateway. This study proposes a novel and exact worst-case response time (WCRT) analysis method for message-processing tasks in the gateway. We first propose a round search method to obtain lower bound on response time (LBRT) and upper bound on response time (UBRT), respectively. We then obtain the exact WCRT belonging to the scope of the LBRT and UBRT with an effective non-exhaustive exploration. Experimental results on a real CAN message set reveal that the proposed exact analysis method can reduce 99.99999% combinations on large-scale CAN clusters.

The controller area network with flexible data-rate (CAN FD) is the new generation of the CAN technology to meet the daily increasing bandwidth requirement for automotive cyber-physical systems (ACPS). However, ACPS is a security-critical system, an efficient security/timing-aware design space exploration (DSE) method is required to fully utilize CAN FD's high data phase data rate. In this paper, we propose an AUTOSAR-compliant system model that integrates both timing and security constraint, an integrated mixed-integer linear programming formulation (i-MILP) for the optimal DSE of CAN FD, and a divide-and-conquer approach to the i-MILP (dc-MILP) to address its timing complexity problem. The experiment results show that dc-MILP scales well for industrial-size systems and saves 1.94%-4.76% bandwidth utilization and guarantees the schedulability for more signal sets by comparing with the state-of-the-art algorithm.

In recent decades, the research of energy-aware scheduling on heterogeneous multiprocessor systems is becoming more and more popular. A classic method for real-time task allocation is Linear Programming (LP). However, existing LP formulations are usually regarded as ineffective in solving large-scale allocation problems due to the unacceptable time consumption. In this work, we propose two integer linear programming (ILP) formulations to deal with the allocation problems for large task sets. One exact ILP(1) is formulated to derive an intermediate solution, and the other relaxed ILP(2) is considered to calculate the desired minimum energy. Then the desired minimum energy can be taken as a reference to evaluate the optimality of the intermediate solution. Experimental results on randomly generated task sets demonstrate that our method achieves average 19.2% less energy within limited time than the classic greedy and the state-of-the-art heuristic algorithm.

Driverless autonomous driving systems require cost-effective architecture satisfying design diversity and real-time performance to fulfill the fail-operational requirements that sustain system safety if a failure occurs during automated driving. However, conventional approaches cannot be applied to the systems due to design diversity. A key challenge in establishing a cost-effective multi-mode architecture is how to enhance the real-time capability of the mode switch. In this work, we propose three replication methods for fail-operational autonomous driving systems with design diversity: Input Backup Replication (IBR), Extended Primary Backup Replication (E-PBR), and Extended Leader Follower Replication (E-LFR). These methods enable accelerated recovery processing by utilizing input data and internal state backup in addition to partial hot standby. We implemented an autonomous driving prototype and found that (i) the proposed replication methods can satisfy the performance requirements for fail-operational systems, (ii) they can reduce 53.8 % of the CPU load compared with the hot standby approach in the normal mode, and (iii) the memory consumption ratio caused by the proposed methods is 0.01%. These results demonstrate that our proposed replication methods are feasible for fail-operational autonomous driving systems with design diversity.

Data stream management systems (DSMSs) are useful for the management and processing of continuous data at a high input rate with low latency. In the automotive domain, embedded systems use a variety of sensor data and communications from outside the vehicle to promote autonomous and safe driving. Thus, the software developed for these systems must be capable of handling large volumes of data and complex processing. At present, we are developing a platform for the integration and management of data in an automotive embedded system using a DSMS. However, compared with conventional DSMS fields, we have encountered new challenges such as precompiling queries when designing automotive systems (which demands time predictability), distributed stream processing in in-vehicle networks, and real-time scheduling and sensor data fusion by stream processing. Therefore, we developed an automotive embedded DSMS (AEDSMS) to address these challenges. The main contributions of the present study are: (1) a clear understanding of the challenges faced when introducing DSMSs into the automotive field; (2) the development of AEDSMS to tackle these challenges; and (3) an evaluation of AEDSMS during runtime using a driving assistance application.

Automotive applications are typical cyber-physical systems, which perform real-time continuous data processing using a variety of onboard sensors and communications from outside the vehicle. However, outside-the-vehicle data transmissions often introduce significant data rate fluctuations, where arrival times can vary or may not be guaranteed. In this study, we investigate real-time data stream processing for automotive applications based on earliest deadline first (EDF) scheduling. When sensor data with an early deadline arrive late to a data stream management system (DSMS), the EDF scheduler enqueues the late data as if they had arrived earlier. As a result, data streams are preemptable, and the stream queues do not satisfy FIFO because they are out-of-order. However, existing real-time scheduling of data streams cannot handle out-of-order queues, and searching of the out-of-order queues based on EDF degrades the performance owing to frequent accessing of the queues. In this study, we present efficient EDF scheduling for the out-of-order stream queues (i.e., Preemptable data streams) in the DSMS. The main contributions of this study are: (1) a seamless definition of EDF scheduling for preemptable data streams (EDF-PStream), which is based on the definition of general data stream processing, (2) a proposal of a reasonable task design for EDF-PStream by merging operators, and (3) a runtime evaluation of EDF-PStream using automotive applications, this includes a comparison with data stream scheduling methods.

Nowadays, in-vehicle network design has become a difficult challenge due to increased complexity and strict real-time constraints. In this work, we propose an integrated framework for CAN network topology design under real-time constraints. The framework integrates topology design with real-time analysis. It firstly allocates electronic control units (ECU) automatically to one of the CAN buses via integer linear programming (ILP) optimization. Then, the worst case response rate (WCRR) results of real-time analysis are fed back to a weighted ILP optimization to further improve the topology design with respect to a realtime property. A case study using a real message set from automaker validated the effectiveness and scalability of the proposed framework.

A software partitioning has been used to develop safety-critical systems in recent years. In addition, software component technologies supporting a software partitioning have been developed. This paper describes the new component technology for embedded software that requires memory protection, which is one of the important features for the partitioning. HR-TECS is a new component technology based on the real-time operating system supporting the static memory layout. Developers can easily allocate components to partitions in order to protect memory areas. In addition, HR-TECS supports inter-partition communications so that developers can implement components without consideration for inter-partition communications. The results of evaluation demonstrate the effectiveness of HR-TECS.

There are several scheduling simulators to verify the behavior of real-time applications under different task scheduling algorithms. Current simulators cannot model the application accurately, and consequently the result of the simulation differs considerably from the actual behavior on a real computing system. This paper presents a scheduling simulator with application modeling capabilities for real-time applications. The proposed approach supports modeling of complex task control flows and dependency relations between tasks. In order to evaluate the modeling capabilities, we modeled a real engine control application and simulated it. We measured the response times of the application model running on our scheduling simulator and compared them with the ones obtained by running the real engine application binaries on an instruction set simulator. The average percentage errors in mean and worst-case response time between both simulations were only 9.6% and 8.6% respectively.

Vehicle control systems have recently emerged to provide drivers with safe driving and warnings of potential danger. Such systems are capable of determining the risk of collision with other vehicles and obstacles based on information from on-board sensors. These systems are often composed of many kinds of sensors whose data must be handled by on-board applications. Reusability and substitutability of these applications may be affected by data formatting dependencies, and the design and development of such systems is usually complex. In this study, we propose data management methods to reduce application complexity in vehicle control systems. To verify the feasibility of the methods, we implemented applications on the two types of data management methods: a database management method and a data stream management method. Both implementations were evaluated and discussed, we concluded that various queries were required by combining these two methods for vehicle control systems.

This paper presents a new technique for reducing the energy consumption of a multi-task system by sharing its scratchpad memory (SPM) space among the tasks. With this technique, tasks can interfere by using common areas of the SPM. However, this requires to update these areas during context switches, which involves considerable overheads. Hence, an integer linear programming formulation is used at compile time for finding the best assignment of memory objects to the SPM and their respective locations inside it. Experiments show that the technique achieves up to 85% energy reduction with 8Kb of SPM and surpasses other sharing approaches.

Scratch-pad memory has been employed as a partial or entire replacement for cache memory due to its better energy efficiency. In this paper, we propose scratch-pad memory management techniques for priority-based preemptive multi-task systems. Our techniques are applicable to a real-time environment. The three methods which we propose, i.e., spatial, temporal, and hybrid methods, bring about effective usage of the scratch-pad memory space, and achieve energy reduction in the instruction memory subsystems. We formulate each method as an integer programming problem that simultaneously determines (1) partitioning of scratch-pad memory space for the tasks, and (2) allocation of program code to scratch-pad memory space for each task. It is remarkable that periods and priorities of tasks are considered in the formulas. Additionally, we implement an RTOS-hardware cooperative support mechanism for a runtime code allocation to the scratch-pad memory space. We have made the experiments with the fully functional real-time operating system. The experimental results with four task sets have demonstrated the effectiveness of our techniques. Up to 73% energy reduction compared to a standard method was achieved.

Extending the idea of preemptive multitasking to DPRS (Dynamic Partial Reconfiguration Systems) has far-reaching implications as many mechanisms supporting the concept, such as context saving and restoring, have to be built practically from scratch. This paper addresses previously neglected issues, related to design of effective preemption mechanisms for Flip-Flop-based and RAM-based hardware tasks. Furthermore, a very efficient and complete solution to hardware task preemption for Virtex4-based DPRS is presented featuring in bitstream manipulation tool intended for PC and embedded system infrastructure with a DMA-based, instruction-driven reconfiguration/readback controller. Taking advantage of the developed lightweight bus, enhancing management of reconfigurable hardware modules, controller takes care of all essential hardware aspects related to context-switching thereby reducing CPU utilization to necessary minimum.

In this paper, we present a hardware sharing method for design space exploration of multiprocessor embedded systems. In our prior work, we had developed a system-level design tool which automatically synthesizes communications among the processes. In this work, we have extended our tool so that the tool can automatically synthesize communications which realize sharing of hardware among different processes. With the tool, designers only need to change the mapping information for hardware sharing. Designers therefore can easily explore wider design space with hardware sharing. A case study shows the effectiveness of our hardware sharing method.

Software component techniques have been widely used for enhancement and the cost reduction of software development. We herein introduce a component system with a real-time operating system (RTOS). A case study of a two-wheeled inverted pendulum balancing robot with the component system is presented. The component system can deal with RTOS resources, such as tasks and semaphores, as components. Moreover, a trace functionality which is a new functionality to confirm the state of components or calling components without modification of C source code is introduced.

The energy efficiency at the algorithmic level on DVS systems and its analysis and optimization methods are presented. Given a problem the most energy efficient algorithm is not uniquely determined but dependend on multiple factors, including intratask dynamic voltage scaling (IntraDVS) policies, the size of intermediate data structure, and the size of inputs. We show that at the algorithmic level principles behind energy optimization and performance optimization are not identical. We propose a metric for evaluating optimal energy efficiency of static voltage scaling (SVS) and a few new effective IntraDVS policies employing data flow information. Experimental results on sorting algorithms show the existence of several tradeoffs in terms of energy consumption. Transforming algorithms by employing problem specific knowledge and data flow information successfully improves their energy efficiency.

Energy-aware real-time multiprocessor scheduling has been studied extensively so far. However, some of the constraints associated with the practical DVS applications have been ignored for simplicity. These constraints include discrete speed, idle power, inefficient speed, and application-specific power characteristics etc. This work targets energy-aware scheduling of periodic real-time tasks on the DVS-equipped multiprocessor systems with practical constraints. An adaptive minimal bound first-fit (AMBFF) algorithm with consideration of these realistic constraints is proposed for both dynamic-priority and fixed-priority multiprocessor scheduling. Simulation results on three commercial processor models show that our algorithm can save significantly more energy than existing algorithms.

A generalized dynamic energy performance scaling (DEPS) framework is proposed for exploring application-specific energy-saving potential in hard real-time embedded systems. This software-centric framework focuses on system-wide energy reduction and takes advantage of possible power control mechanisms to trade off performance for energy savings. Three existing technologies, i.e., dynamic hardware resource configuration (DHRC), dynamic voltage frequency scaling (DVFS), and dynamic power management (DPM) have been employed in this framework to achieve the maximal energy savings. Static and dynamic schemes of DEPS are proposed to deal with stable or variable workload in the embedded systems. Through a case study, its effectiveness has been validated.

In general, standard benchmark suites are critically important for researchers to quantitatively evaluate their new ideas and algorithms. This paper presents CHStone, a suite of benchmark programs for C-based high-level synthesis. CHStone consists of a dozen of large, easy-to-use programs written in C, which are selected from various application domains. This paper also presents synthesis results which will be served as a baseline for researchers to compare their new techniques with. In addition, we present a case study on function-level transformation using a program in the CHStone suite.

Multiprocessor designs have become popular in embedded domains for achieving the power and performance requirements. In this paper, we present principles and techniques for design and implementation of RTOS for embedded multiprocessor systems. We also present a system-level design toolkit for rapid design and evaluation of embedded multiprocessor systems.

This paper proposes a behavioral level partitioning method for efficient behavioral synthesis from a large sequential program consisting of a set of functions. Our method optimally determines functions to be inlined into the main module and ones to be synthesized into sub modules in such a way that the overall datapath is minimized while the complexity of individual modules is lower than a certain level. The partitioning problem is formulated as an integer programming problem. Experimental results show the effectiveness of the proposed method.

In recent years, embedded system technologies are evolving rapidly and in short-handedness of experienced engineers has become a serious problem. To solve this problem from the point of view of students and young engineers, a committee is organized by those members. We, the committee members, planned to provide a new educational material and a curriculum for students and young engineers to have an opportunity to learn embedded system technologies during summer time as Summer School on Embedded System Technologies (SSEST). In this school, we aim to provide an education for basic knowledge and techniques about embedded systems through a whole development process and an interchange among people of different universities and companies through the processes. In this paper, we introduce the plan of summer school, and its educational material and the curriculum of SSEST in 2005 and 2006.

In the last decade, the size and complexity of the software in embedded systems have increased. The present study attempts to decrease the complexity and difficulty of software development in embedded systems. We herein introduce a new component system that is suitable for embedded systems. It is possible to estimate the memory consumption of an entire application since the proposed system adopts a static configuration. In addition, this system takes into account to be used in several domains of embedded systems because several particle sizes of component are supported. Moreover, the concept of the component for a distributed application is presented

A task that suspends itself to wait for an I/O completion or to wait for an event from another node in distributed environments is called an I/O blocking task. In conventional hard real-time scheduling theories, there exist several approaches to schedule such I/O blocking tasks within the conventional framework of rate monotonic analysis (RMA). However, most of them are pessimistic. In this paper, we propose effective algorithms that can schedule a task set which includes I/O blocking tasks under dynamic priority assignment. We present a new critical instant theorem for multi-frame task set under dynamic priority assignment. The schedulability is analyzed under the new critical instant theorem. For the schedulability analysis , this paper presents saturation summation which is used to calculate maximum interference function (MIF). With the saturation summation, the schedulability of a task set including I/O blocking tasks can be analyzed more accurately. We propose an algorithm which is based on a frame laxity monotonic scheduling (FLMS). Genetic algorithm is also applied. From our experiments, we can conclude that the FLMS can significantly reduce the time of the calculation time, and GA can improve task schedulability ratio than the FLMS.

Behavioral synthesis, which automatically synthesizes an RTL circuit from a sequential program, is one of promising technologies to improve the design productivity. However, behavioral synthesis has not become popular yet in industry since the quality of generated circuits is not satisfactory, especially in the synthesis from the large programs with a number of functions. This paper proposes a method to optimize function calls in behavioral synthesis. We formulate the optimization problem using integer linear programming. Our experimental results show that our method reduces the circuit area by 44.6%, compared with a traditional method

An advanced communication system, the FlexRay system, has been developed for future automotive applications. It consists of time-triggered clusters, such as drive-by-wire in cars, in order to meet different requirements and constraints between various sensors, processors, and actuators. In this paper, an approach to static scheduling for FlexRay systems is proposed. Our experimental results show that the proposed scheduling method significantly reduces up to 36.3% of the network traffic compared with a past approach.

In recent years, the use of cache memory has been desired in hard real-time systems in order to reduce the memory access time. To enable it, accurate analysis of the worst-case execution time considering cache flushes is necessary since the cache may be flushed by preempting tasks in a multitask environment. This paper proposes a method to find the worst-case timing of cache flushes and demonstrates its effectiveness.

We are investigating an integrated design method for a device driver and a device in order to efficiently develop device drivers used in embedded systems. This paper evaluates whether SpecC, which is proposed as a system level description language, is applicable to an integrated description language for the integrated design method. We use an SIO system to confirm the feasibility of using SpecC for integrating a device and description device driver. We manually convert the SpecC description to the device, the device driver and the interface in between and confirm that the conversion can be automated. We also confirm the feasibility of conversion when the partition point between the software and the hardware is changed. As a result, we show that SpecC could apply as a integrated design language of the design method.

The TOPPERS Project is to develop a series of open source real-time operating systems (RTOS) for embedded systems. The TOPPERS/JSP Kernel, which is the first product of the project, was released two years ago and is started to be used in industries. A technological basis of the TOPPERS Project is the ITRON Specification, which is a de-facto standard real-time kernel specification widely applied to consumer electronics, cellular phones, and other small-scale embedded systems in Japan.