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Amir Alon

dblp:40/926 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1988
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
physical design
0.011988
Model and solution strategy for placement of rectangular blocks in the Euclidean plane · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Electronic design automation › physical design › design planning
placement and floorplanning
0.011988
Model and solution strategy for placement of rectangular blocks in the Euclidean plane · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Electronic design automation › physical design › layout optimization
wire length minimization
0.011988
Model and solution strategy for placement of rectangular blocks in the Euclidean plane · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Electronic design automation › physical design › VLSI layout
printed wiring board layout
0.011988
Model and solution strategy for placement of rectangular blocks in the Euclidean plane · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Electronic design automation › physical design
VLSI layout
0.011988
Model and solution strategy for placement of rectangular blocks in the Euclidean plane · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988

Methods — techniques the papers use, named apart from their topics

penalty function · 0.0nonlinear optimization · 0.0lennard-jones potential · 0.0
YearPublicationVenuePosition
1988 Model and solution strategy for placement of rectangular blocks in the Euclidean plane
abstract
The authors describe a nonlinear optimization model for the placement of rectangular blocks with some wire connections among them in the Euclidean plane, so that the total wire length is minimized. Such a placement algorithm is useful as a CAD tool for VLSI and printed-circuit-board layout designs. The model ensures that the blocks will not overlap and minimizes the sum of the distances of the interconnections of the blocks with respect to their orientation as well as their position. Mechanisms are presented for solving more restrictive placement problems, including one in which there is a set of equally spaced, discrete angles to be used in the placement. The mathematical model is based on the Lennard-Jones 6-12 potential equation, on a sine-wave-shaped penalty function, and on minimizing the sum of the squares of the Euclidean distances of the block interconnections. Experimental results are presented to show that good placements are achieved with these techniques.>
Amir Alon, Uri M. Ascher
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1