EDBT 2026 Demo / reviewers in the wild / expert
Zijia Su
dblp:400/2824
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2025
0000-0001-5566-0549ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 54% Memory systems · 46% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems › processing-in-memory › computing-in-memory
analog in-memory computing |
0.9 | 1 | 2025 | YOCO: A Hybrid In-Memory Computing Architecture with 8-bit Sub-PetaOps/W In-Situ Multiply Arithmetic for Large-Scale AI · DAC 2025 |
Hardware accelerators and domain-specific architectures › machine learning accelerator
in-memory computing accelerator |
0.9 | 1 | 2025 | YOCO: A Hybrid In-Memory Computing Architecture with 8-bit Sub-PetaOps/W In-Situ Multiply Arithmetic for Large-Scale AI · DAC 2025 |
Hardware accelerators and domain-specific architectures
machine learning accelerator |
0.9 | 1 | 2025 | YOCO: A Hybrid In-Memory Computing Architecture with 8-bit Sub-PetaOps/W In-Situ Multiply Arithmetic for Large-Scale AI · DAC 2025 |
Memory systems
processing-in-memory |
0.9 | 1 | 2025 | YOCO: A Hybrid In-Memory Computing Architecture with 8-bit Sub-PetaOps/W In-Situ Multiply Arithmetic for Large-Scale AI · DAC 2025 |
Hardware accelerators and domain-specific architectures › machine learning accelerator
transformer accelerator |
0.3 | 1 | 2025 | YOCO: A Hybrid In-Memory Computing Architecture with 8-bit Sub-PetaOps/W In-Situ Multiply Arithmetic for Large-Scale AI · DAC 2025 |
Methods — techniques the papers use, named apart from their topics
time-domain accumulation · 0.9charge-domain computation · 0.9ReRAM-SRAM hybrid · 0.9
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | YOCO: A Hybrid In-Memory Computing Architecture with 8-bit Sub-PetaOps/W In-Situ Multiply Arithmetic for Large-Scale AIabstractIn this paper, we further explore the potential of analog in-memory computing (AiMC) and introduce an innovative artificial intelligence (AI) accelerator architecture named YOCO, featuring three key proposals: (1) YOCO proposes a novel 8-bit in-situ multiply arithmetic (IMA) achieving 123.8 TOPS/W energy-efficiency and 34.9 TOPS throughput through efficient charge-domain computation and time-domain accumulation mechanism. (2) YOCO employs a hybrid ReRAM-SRAM memory structure to balance computational efficiency and storage density. (3) YOCO tailors an IMC-friendly attention computing flow with an efficient pipeline to accelerate the inference of transformer-based AI models. Compared to three SOTA baselines, YOCO on average improves energy efficiency by up to $3.9 \times \sim 19.9 \times$ and throughput by up to $6.8 \times \sim 33.6 \times$ across $10 \mathrm{CNN} /$ transformer models. Zihao Xuan, Yuxuan Yang 0009, Zijia Su, Song Chen 0001, Yi Kang |
DAC | 4 |