Demo Data from EDBT 2026 / reviewers in the wild / expert
Berk Aydogmus
dblp:401/7278
· DBLP profile ↗
1ranked-venue papers
1as first author
1since 2021 · last 2025
0009-0000-8898-4160ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 100% |
Topics — the 2 heaviest of 2, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture › exception handling
interrupt handling |
0.9 | 1 | 2025 | Extended User Interrupts (xUI): Fast and Flexible Notification without Polling · ASPLOS (2) 2025 |
Processor architecture and microarchitecture › instruction set architecture
processor extensions |
0.3 | 1 | 2025 | Extended User Interrupts (xUI): Fast and Flexible Notification without Polling · ASPLOS (2) 2025 |
Methods — techniques the papers use, named apart from their topics
gem5 simulation · 0.9
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Extended User Interrupts (xUI): Fast and Flexible Notification without PollingabstractExtended user interrupts (xUI) is a set of processor extensions that builds on Intel's UIPI model of user interrupts, for enhanced performance and flexibility. This paper deconstructs Intel's current UIPI design through analysis and measurement, and uses this to develop an accurate model of its timing. It then introduces four novel enhancements to user interrupts: tracked interrupts, hardware safepoints, a kernel bypass timer, and interrupt forwarding. xUI is modeled in gem5 simulation and evaluated on three use cases -- preemption in a high-performance user-level runtime, IO notification in a layer3 router using DPDK, and IO notification in a synthetic workload with a streaming accelerator modeled after Intel's Data Streaming Accelerator. This work shows that xUI offers the performance of shared memory polling with the efficiency of asynchronous notification. Berk Aydogmus, Linsong Guo, Danial Zuberi, Tal Garfinkel, Dean M. Tullsen, Amy Ousterhout, Mohammadkazem Taram |
ASPLOS (2) | 1 |