Demo Data from EDBT 2026 / reviewers in the wild / expert
Yulong Zu
dblp:401/8586
· DBLP profile ↗
3ranked-venue papers
0as first author
3since 2021 · last 2026
0009-0003-2698-4343ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 3 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Parallel and multicore computing · 88% Distributed systems · 12% | |
| Computer networks
1 paper |
Edge and fog computing · 100% | |
| Databases, data mining, and information retrieval
1 paper |
Machine learning and data management · 100% |
Topics — the 6 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Edge and fog computing
edge inference |
1.0 | 1 | 2026 | AsyncGrid: An Intralayer and Interlayer Asynchronous Hybrid Parallelism System for Responsive Edge LLM Inference · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026 |
Edge and fog computing › edge inference
LLM inference on edge |
1.0 | 1 | 2026 | AsyncGrid: An Intralayer and Interlayer Asynchronous Hybrid Parallelism System for Responsive Edge LLM Inference · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026 |
Parallel and multicore computing › parallelization strategies
model parallelism |
1.0 | 1 | 2026 | AsyncGrid: An Intralayer and Interlayer Asynchronous Hybrid Parallelism System for Responsive Edge LLM Inference · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026 |
Parallel and multicore computing
parallel programming models and runtimes |
1.0 | 1 | 2026 | AsyncGrid: An Intralayer and Interlayer Asynchronous Hybrid Parallelism System for Responsive Edge LLM Inference · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026 |
Distributed systems › distributed machine learning
distributed inference |
0.3 | 1 | 2026 | AsyncGrid: An Intralayer and Interlayer Asynchronous Hybrid Parallelism System for Responsive Edge LLM Inference · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026 |
Parallel and multicore computing
pipeline parallelism |
0.3 | 1 | 2026 | AsyncGrid: An Intralayer and Interlayer Asynchronous Hybrid Parallelism System for Responsive Edge LLM Inference · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2026 |
Methods — techniques the papers use, named apart from their topics
performance profiling · 3.0integer programming · 3.0causal attention · 3.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | AsyncGrid: An Intralayer and Interlayer Asynchronous Hybrid Parallelism System for Responsive Edge LLM InferenceabstractEdge deployment of large language models (LLMs) is increasingly attractive due to its advantages in privacy, customization, and availability. However, edge environments face significant challenges in reducing Time-to-First-Token (TTFT). TTFT consists of (1) queuing delay and (2) prefill latency, both of which are exacerbated by edge‑resource constraints: the substantial computational demands of LLM inference grow superlinearly with prompt length, causing high prefill latency; and limited edge resources restrict prefill throughput, preventing the timely handling of incoming requests, thereby exacerbating queuing delays. Model parallelism is a commonly used solution in cloud-based systems, but directly applying it to edge environments proves ineffective. Intra-layer parallelism (e.g., tensor/sequence parallelism) can reduce prefill latency but suffers from frequent global synchronization, which bottlenecks prefill throughput due to edge-limited interconnection bandwidth. Inter-layer parallelism (e.g., pipeline parallelism) improves prefill throughput via fully asynchronous execution but retains high prefill latency due to stage-wise serialized computation. To address this dilemma, this paper leverages the properties of the causal attention mechanism in LLMs and proposes Intra-layer Asynchronous Parallelism (IAP), which performs intra-layer parallel computations to reduce prefill latency while avoiding global synchronization to mitigate prefill throughput bottlenecks. Moreover, considering communication sensitivity in intra-layer parallelism, this paper integrate IAP with inter-layer asynchronous parallelism into a unified plan space. This hybrid parallelism adapts to diverse hardware and request loads, enabling more effective TTFT optimization. To enable the end-to-end implementation of this hybrid parallelism, this paper propose AsyncGrid, an LLM inference system tailored for responsive edge LLM inference. AsyncGrid (1) models runtime overheads through a performance profiler, (2) employs an integer programming (IP) formulation to optimize execution plan, with the objective of minimizing latency while meeting throughput requirements, and (3) implements fine-grained communication optimization during runtime. A comprehensive evaluation on an edge testbed demonstrates AsyncGrid’s significant advantages over existing methods, achieving substantial improvements in both homogeneous and heterogeneous settings. Yi Xiong 0003, Rui Zhang 0040, Yulong Zu, Weihong Liu, Zongwei Zhu, Jiawei Geng, Boyu Li 0006, Qianyue Cao, Xuehai Zhou |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 3 |
| 2025 | HeterScale: A hierarchical task scheduling framework for intelligent edge collaboration in IIOT
Weihong Liu, Zongwei Zhu, Yulong Zu |
J. Syst. Archit. | 4 |
| 2024 | EPipe: Pipeline Inference Framework with High-quality Offline Parallelism Planning for Heterogeneous Edge DevicesabstractPipeline parallelism is essential for edge computing as it effectively consolidates the limited resources of edge devices, enabling the deployment of large Deep Neural Network (DNN) models and accelerating inference processes without compromising the performance of models. Accurate computation and communication latency estimation on heterogeneous edge devices is essential for searching for a superior parallelism plan. However, existing heterogeneous pipeline inference approaches either incur substantial resource wastage during online parallelism planning, as they utilize profiling strategies that occupy physical devices; or rely on cost models with inadequate representational capabilities, leading to inaccurate predictions, thereby harming the result of pipeline planning. This paper proposes EPipe, a novel pipeline inference framework that supports high-quality offline planning in heterogeneous edge environments. EPipe integrates two core components: the Task-Device Co-analyzer (TDC) and the Multi-pipeline Parallelism Planner (MPP). TDC utilizes an undirected connected graph to depict the compatibility of DNNs across device groups and precisely estimates inference and communication latencies through fine-grained modeling. Based on TDC, MPP utilizes a dynamic programming-based genetic algorithm to explore multi-pipeline solutions, extending beyond traditional single-pipeline methods. A comprehensive experimental evaluation on an edge testbed confirms the effectiveness of EPipe, demonstrating significant speedups in inference tasks for both task streams and single tasks. Yi Xiong 0003, Weihong Liu, Rui Zhang 0040, Yulong Zu, Zongwei Zhu, Xuehai Zhou |
ICCAD | 4 |