Demo Data from EDBT 2026 / reviewers in the wild / expert
Changyao Tan
dblp:402/8030
· DBLP profile ↗
2ranked-venue papers
0as first author
2since 2021 · last 2026
0009-0003-8459-2786ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Network and information security
1 paper |
Cryptographic protocols and secure computation · 50% Privacy and data protection · 50% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 77% Storage systems · 23% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Privacy and data protection › information leakage
access pattern leakage |
0.9 | 1 | 2025 | DC-ORAM: An ORAM Scheme Based on Dynamic Compression of Data Blocks and Position Map · IEEE Trans. Computers 2025 |
Cryptographic protocols and secure computation › oblivious data structures
oblivious RAM |
0.9 | 1 | 2025 | DC-ORAM: An ORAM Scheme Based on Dynamic Compression of Data Blocks and Position Map · IEEE Trans. Computers 2025 |
Storage systems
data compression |
0.3 | 1 | 2025 | DC-ORAM: An ORAM Scheme Based on Dynamic Compression of Data Blocks and Position Map · IEEE Trans. Computers 2025 |
Methods — techniques the papers use, named apart from their topics
high-bit multiplexing · 1.7byte stream redundancy compression · 1.7
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | VM-ORAM: A Novel High-Performance ORAM Architecture for Efficient Data Integrity Verification in Industrial CloudabstractWith the rapid surge in industrial data, cloud computing has been integrated into Industrial Internet of Things (IIoT) systems to store, compute, and share massive data. In this process, privacy and data integrity are core concerns. Oblivious RAM (i.e., ORAM) is a technology widely applied to defend against cloud storage access pattern attacks. However, most existing ORAM systems do not consider the integration of data integrity verification technology. Although there are integrity verification systems integrated into conventional Path ORAM and Ring ORAM, they are not suitable for existing new ORAM systems. And the existing data integrity verification ORAM system still has the problem of excessive performance overhead. To address these challenges, this article proposes a novel high-performance data integrity ORAM system, VM-ORAM. Optimizes the ORAM integrity verification process by integrating dynamic scheduling and multipath eviction strategies, thereby minimizing performance loss. The comprehensive analysis and experimental results of this article show that VM-ORAM system not only defends against data tampering attacks, but also maintains high performance of the system. Chuang Li 0004, Gang Liu 0038, Changyao Tan, Limei Liu, Wenhua Ye, Anthony T. Chronopoulos |
IEEE Trans. Ind. Informatics | 4 |
| 2025 | DC-ORAM: An ORAM Scheme Based on Dynamic Compression of Data Blocks and Position MapabstractOblivious RAM (ORAM) is an efficient cryptographic primitive that prevents leakage of memory access patterns. It has been referenced by modern secure processors and plays an important role in memory security protection. Although the most advanced ORAM has made great progress in performance optimization, the access overhead (i.e., data blocks) and on-chip (i.e., PosMap) storage overhead is still too high, which will lead to problems such as low system performance. To overcome the above challenges, in this paper, we propose a DC-ORAM system, which reduces the data access overhead and on-chip PosMap storage overhead by using dynamic compression technology. Specifically, we use byte stream redundancy compression technology to compress data blocks on the ORAM tree. And in PosMap, a high-bit multiplexing strategy is used to achieve data compression for binary high-bit repeated data of leaf labels (or path labels). By introducing the above compression technology, in this work, compared with conventional Path ORAM, the compression rate of the ORAM tree is$52.9\%$, and the compression rate of PosMap is$40.0\%$. In terms of performance, compared to conventional Path ORAM, our proposed DC-ORAM system reduces the average latency by$33.6\%$. In addition, we apply the compression technology proposed in this work to the Ring ORAM system. By comparison, it is found that with the same compression ratio as Path ORAM, our design can still reduce latency by an average of$21.5\%$. Chuang Li 0004, Changyao Tan, Gang Liu 0038, Yanhua Wen, Yan Wang 0022, Kenli Li 0001 |
IEEE Trans. Computers | 2 |