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Paul Trojahn

dblp:407/8829 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2025
0009-0007-9457-0424ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
GPUs and heterogeneous computing · 77% High-performance computing · 23%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
GPUs and heterogeneous computing › GPU programming
GPU programming models
0.912025
GPUs All Grown-Up: Fully Device-Driven SpMV Using GPU Work Graphs · ISCA 2025
GPUs and heterogeneous computing › GPU computing › GPU sparse computation
GPU sparse matrix-vector multiplication
0.912025
GPUs All Grown-Up: Fully Device-Driven SpMV Using GPU Work Graphs · ISCA 2025
High-performance computing
sparse linear algebra
0.312025
GPUs All Grown-Up: Fully Device-Driven SpMV Using GPU Work Graphs · ISCA 2025
High-performance computing › sparse linear algebra › sparse matrix computation
SpMV
0.312025
GPUs All Grown-Up: Fully Device-Driven SpMV Using GPU Work Graphs · ISCA 2025

Methods — techniques the papers use, named apart from their topics

dynamic on-device self-scheduling · 0.9
YearPublicationVenuePosition
2025 GPUs All Grown-Up: Fully Device-Driven SpMV Using GPU Work Graphs
abstract
Sparse matrix-vector multiplication (SpMV) is a key operation across high-performance computing, graph analytics, and many more applications.In these applications, the matrix characteristics, notably non-zero elements per row, can vary widely and impact which algorithm performs best.Thus, Graphics Processing Unit (GPU) SpMV algorithms often rely on costly preprocessing to determine what per-row algorithm to select to achieve high performance.In this work we combine SpMV preprocessing and the subsequent per-row processing on the GPU by leveraging the novel "Work Graphs" GPU programming model-initially designed for graphics applications-for dynamic on-device self-scheduling.Work Graphs allow for fine-grain dataflow execution of individual workgroups using emerging hardware and firmware support.As soon as preprocessing has generated sufficient work, workgroups of individual processing kernels are self-scheduled and executed, interleaved with those of other kernels.This improves cache locality and eliminates host interaction altogether.Across a suite of 59 sparse matrices, the best of various novel Work Graphs SpMV implementations outperforms state-of-the-art rocSPARSE "LRB" for a single SpMV by up to 7.19× (mean: 3.35×, SD: 1.89).Furthermore, it achieves much more stable performance across various sparsity patterns than the rocSPARSE CSR-General algorithm, and even beats the advanced rocSPARSE CSR-Adaptive algorithm for up to 92 consecutive SpMV calculations.In addition, compared to rocSPARSE LRB, it reduces code complexity by 75%.Its memory footprint for supporting data structures is a fixed ∼25 MiB independent of matrix size, compared to rocSPARSE LRB's data structures that scale with matrix
Fabian Wildgrube, Pete Ehrett, Paul Trojahn, Richard Membarth, Bradford M. Beckmann, Dominik Baumeister, Matthäus G. Chajdas
ISCA3