Demo Data from EDBT 2026 / reviewers in the wild / expert
Yuge Cheng
dblp:407/9333
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2025
0009-0001-5587-0463ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer graphics and multimedia
1 paper |
Rendering · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 100% | |
| Artificial intelligence
1 paper |
Efficient and distributed learning · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Rendering › gaussian splatting
3d gaussian splatting |
0.9 | 1 | 2025 | Lumina: Real-Time Neural Rendering by Exploiting Computational Redundancy · ISCA 2025 |
Rendering
neural rendering |
0.9 | 1 | 2025 | Lumina: Real-Time Neural Rendering by Exploiting Computational Redundancy · ISCA 2025 |
Hardware accelerators and domain-specific architectures
neural rendering accelerator |
0.9 | 1 | 2025 | Lumina: Real-Time Neural Rendering by Exploiting Computational Redundancy · ISCA 2025 |
Machine learning › Efficient and distributed learning
model compression |
0.3 | 1 | 2025 | Lumina: Real-Time Neural Rendering by Exploiting Computational Redundancy · ISCA 2025 |
Methods — techniques the papers use, named apart from their topics
temporal coherence · 2.6radiance caching · 2.6
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | Lumina: Real-Time Neural Rendering by Exploiting Computational Redundancyabstract3D Gaussian Splatting (3DGS) has vastly advanced the pace of neural rendering, but it remains computationally demanding on today's mobile SoCs.To address this challenge, we propose Lumina, a hardware-algorithm co-designed system, which integrates two principal optimizations: a novel algorithm, S 2 , and a radiance caching mechanism, RC, to improve the efficiency of neural rendering.S 2 algorithm exploits temporal coherence in rendering to reduce the computational overhead, while RC leverages the color integration process of 3DGS to decrease the frequency of intensive rasterization computations.Coupled with these techniques, we propose an accelerator architecture, LuminCore, to further accelerate cache lookup and address the fundamental inefficiencies in Rasterization.We show that Lumina achieves 4.5× speedup and 5.3× energy reduction against a mobile Volta GPU, with a marginal quality loss (< 0.2 dB peak signal-to-noise ratio reduction) across synthetic and real-world datasets. Yu Feng 0007, Weikai Lin, Yuge Cheng, Zihan Liu 0002, Jingwen Leng, Minyi Guo, Chen Chen 0067, Shixuan Sun, Yuhao Zhu 0001 |
ISCA | 3 |