Privacy-Preserving Mutual Authentication (PPMA) protocols utilize Physical Unclonable Function (PUF) and True Random Number Generator (TRNG) as security primitives to protect privacy. To ensure the security of Internet of Things (IoT) nodes in untrusted environments, PPMA keys and encrypted data must reside on the same chip. The concept of integrating PUF and TRNG on a single device has thus emerged as a new security paradigm. This paper proposes a novel lightweight, portable, multi-mode reconfigurable integrated PUF-TRNG architecture resistant to machine learning attacks. Through co-design, the architecture achieves the integration and switching among three modes: Arbiter Physical Unclonable Function (APUF), Ring Oscillator Physical Unclonable Function (RO PUF), and TRNG. The APUF mode leverages the RO PUF mode for assistance, endowing it with machine learning resistance, where the highest prediction rates using Logistic Regression (LR), Support Vector Machine (SVM), CMA (Comparative Model Analysis), and Deep Neural Network (DNN) algorithms are only around 60%. Additionally, a lightweight authentication protocol is proposed to further enhance resistance against machine learning attacks. In TRNG mode, the architecture has two outputs, each capable of generating random numbers at 800 Mbps, resulting in a total throughput of 1600 Mbps. The generated random numbers have successfully passed various tests, including NIST SP800-22, NIST SP800-90B, AIS-31, and TESTU01. In the NIST SP800-22 test, the pass rates for both outputs of the Artix-7 and Kintex-7 FPGAs are approximately 99%.

True random number generator (TRNG) is a key component in ensuring hardware security, and with the development of technologies such as high-speed communications, there is a higher demand for its generation rate. In this work, an ultra-high throughput rate TRNG based on a scalable cascaded full feedback ring oscillator (CFFRO) as the entropy source circuit is presented and implemented on Xilinx Artix-7, Kintex-7, and zynq UltraScale+ FPGAs devices. Unlike previous works, the proposed CFFRO is designed to be constructed as multiple parallel internal ROs, which, in turn, are sequentially cascaded and coupled to each other to disrupt the frequency spectrum of each ring oscillator and enhance the output uncertainty. Each internal ring oscillator in CFFRO can be used as an output for random numbers, creating multi-channel TRNG with parallel outputs and single-channel TRNG with multi-bit serial outputs. Measurements of the sequences extracted by both random number output schemes of TRNG show good randomness in the NIST SP800-22 suits and high entropy values in both the NIST SP 800-90B and AIS-31 testing suits, and the Dieharder suite verified the robustness under voltage and temperature variations. Moreover, due to the good extensibility of CFFRO, TRNGs with 2–8 channel counts are implemented in this work. At a sampling frequency of 400 MHz, the random sequences generated by 2–8 channel TRNGs can pass the tests.

As a core component in the field of information security, the true random number generator (TRNG) produces high-entropy random numbers by extracting unpredictable noise from the physical environment, exhibiting nonreproducibility and resistance to prediction. To address the challenges posed by interference in high-speed systems, maintaining stable throughput and entropy sources for TRNG, this article proposes an optimized TRNG that utilizes chaotic interference to refresh the cellular automata (IRCA) iterative algorithm. The IRCA-TRNG utilizes a self-timed ring oscillator (STR) and jitter to perturb the operation of chaotic cellular automata (CA) cells, achieving a high-throughput TRNG. The generated random sequences have successfully passed NIST SP800-22, TESTU01, NIST SP800-90B, and AIS-31 tests. A throughput of 1040 Mb/s has been achieved on Xilinx Artix-7 and PYNQ-K2 series development boards. Compared with the state-of-the-art works, the proposed TRNG demonstrates significant advantages in resource utilization and performance quality factors.