Abstract. A [Formula: see text]-graph system [Formula: see text] is a family of not necessarily distinct [Formula: see text]-graphs on the same [Formula: see text]-vertex set [Formula: see text], and a [Formula: see text]-graph [Formula: see text] on [Formula: see text] is said to be [Formula: see text]-transversal provided that there exists an injection [Formula: see text] such that [Formula: see text] for all [Formula: see text]. We show that given [Formula: see text], sufficiently large [Formula: see text], and an [Formula: see text]-vertex [Formula: see text]-graph system [Formula: see text], if [Formula: see text] for each [Formula: see text], then there exists an [Formula: see text]-transversal tight Hamilton cycle. This extends the result of Rödl, Ruciński, and Szemerédi [ Combinatorica, 28 (2008), pp. 229–260] on single [Formula: see text]-graphs.

Abstract. We prove that for [Formula: see text] with [Formula: see text] and [Formula: see text], there exist [Formula: see text] and [Formula: see text] such that for every [Formula: see text], every [Formula: see text]-vertex graph [Formula: see text] with [Formula: see text] and [Formula: see text] contains an [Formula: see text]th power of a Hamilton cycle. We also show that the minimum degree condition is asymptotically sharp for [Formula: see text] and the [Formula: see text] case was recently conjectured by Staden and Treglown.

Abstract. Given two graphs [Formula: see text] and [Formula: see text], an [Formula: see text] -tiling of [Formula: see text] is a collection of vertex-disjoint copies of [Formula: see text] in [Formula: see text] and an [Formula: see text] -factor is an [Formula: see text]-tiling that covers all vertices of [Formula: see text]. Kühn and Osthus managed to characterize, up to an additive constant, the minimum degree threshold which forces an [Formula: see text]-factor in a host graph [Formula: see text]. In this paper we study a similar tiling problem in a system that is locally bounded. An incompatibility system [Formula: see text] consists of a graph [Formula: see text] and a family [Formula: see text] over [Formula: see text] with [Formula: see text]. We say that two edges [Formula: see text] are incompatible if [Formula: see text] for some [Formula: see text], and otherwise compatible. A subgraph [Formula: see text] of [Formula: see text] is compatible if every pair of edges in [Formula: see text] are compatible. An incompatibility system [Formula: see text] is [Formula: see text] -bounded if for any vertex [Formula: see text] and any edge [Formula: see text] incident with [Formula: see text], there are at most [Formula: see text] members of [Formula: see text] containing [Formula: see text]. This notion was partly motivated by a concept of transition system introduced by Kotzig [ Matematick[Formula: see text] časopis, 18 (1968), pp. 76–80], and first formulated by Krivelevich, Lee, and Sudakov [ Combinatorica, 37 (2017), pp. 697–732], to study the robustness of Hamiltonicity of Dirac graphs. We prove that for any [Formula: see text] and any graph [Formula: see text] with [Formula: see text] vertices, there exists a constant [Formula: see text] such that for any sufficiently large [Formula: see text] with [Formula: see text], if [Formula: see text] is an [Formula: see text]-vertex graph with [Formula: see text] and [Formula: see text] is a [Formula: see text]-bounded incompatibility system, then there exists a compatible [Formula: see text]-factor in [Formula: see text], where the value [Formula: see text] is either the chromatic number [Formula: see text] or the critical chromatic number [Formula: see text] and we provide a dichotomy as in the Kühn–Osthus result. Moreover, we give examples [Formula: see text] for which there exists an [Formula: see text]-bounded incompatibility system [Formula: see text] with [Formula: see text] and [Formula: see text] such that [Formula: see text] contains no compatible [Formula: see text]-factor. Unlike in the previous work of Kühn and Osthus on embedding [Formula: see text]-factors, our proof uses the lattice-based absorption method.

This paper investigates the stability of a power system with distributed EV integration embedded by cyber delays in the cyber-physical system. An efficient stability region extraction method based on infinitesimal generator transformation is used to extract all stabilizing values in cyber delay space. We obtain the disrupted time-delay stability region for the power system with a single and double EV aggregators and investigate the interaction among the delay margins and PI controller gains. Verification of theoretical stability region boundaries is shown by time-domain simulations for test points selected from stability regions. Through the case study, it is revealed that with the integration of distributed EVs into the power system, there is no longer a definite time-delay stability margin like the traditional power system, but under some parameter settings, the system stability region is disrupted by several intervals and presents periodic changes. And the cyber delay in EV aggregator with the higher participation ratio has a smaller range of cyber delay region. Results also show that an increase in the integrator gain reduces the stability region, while the range of stability region in time-delay space increases and then decreases as increases, which introduces cyber stability challenges to traditional frequency dynamics. It is expected that the proposed criteria can help to guide the determination of delay requirements for EV aggregators participating in frequency regulation service.

Currently, multimedia data has become one of the major data types processed and transferred on the Internet. With the rapid growth of multimedia data, it is vitally important to find an efficient way to extract useful information from a large amount of data. SIFT and SURF, as the most popular multimedia feature extraction algorithms, have been widely used in many applications. However, the limited processing speed~(about 1.8 and 2.6 images or frames per second for SIFT and SURF respectively on an ordinary CPU) makes it impossible to apply them in many real-world applications with real-time requirements. Therefore, it has become one of the major challenges that how to improve the processing speed of these multimedia feature extraction algorithms. The popularity of multi-core architecture and the increase of computation resources on different platforms provide a new opportunity to accelerate the processing speed of these image feature extraction algorithms. In this paper, we first systematically analyze the major parallel constraints in SIFT and SURF, such as imbalanced workload and indeterminate time distribution. Then, based on these analysis, we design and implement an adaptive pipeline parallel scheme (AD-PIPE) for both SIFT and SURF to alleviate these limitations. In our scheme, we dynamically check the workload in different pipeline stages and adjust the thread number in different stages to achieve a balanced partition. Experimental results show that our approach is efficient and scalable. It can achieve a speedup of 16.88X and 20.33X respectively for SIFT and SURF on a 16-core machine and a real time processing speed with about 27 and 52 images or frames per second.

The prevalence of the Internet and cloud computing has made multimedia data, such as image data and video data, become major data types in our daily life. For example, many data-intensive applications, such as health care and video recommendation, involve collecting, indexing and retrieving tera-scale multimedia data every day. With such a huge amount of multimedia data to process, the processing speed has been one of the major challenges to guarantee real-time requirements. The advent of multi-core hardware has opened new opportunities to improve the effectiveness of multimedia data processing. In this paper, we make a comprehensive analysis on different potential parallelism, including pipeline parallelism, task parallelism at both scale level and block level, data parallelism, and their combinations, in a typical image retrieval algorithm called SURF, which is the core algorithm of many multimedia (i.e., image and video) retrieval applications. Experimental results show the following observations of parallelism in SURF: 1) when only one level parallelism is exploited, block-level parallelism is more efficient and scalable than other alternatives; 2) data parallelism cannot be ignored especially when parallel resources increase and 3) the combination of block-level parallelism and pipeline parallelism is the most efficient parallelizing manner for the studied image retrieval algorithm. Based on these observations, we have implemented a parallel image retrieval algorithm. It can be easily mapped onto different multi-core platforms with good scalability. On a commodity server machine with 16-core, the parallel implementation achieves a speedup of 13X, which is 84% faster than P-SURF, a previous state-of-the-art parallelization of SURF on CPU; while on GPGPU, it achieves a speedup of 46X, which is 53% faster than CUDA SURF, a previous state-of-the-art parallelization of SURF on GPGPU.