Demo Data from EDBT 2026 / reviewers in the wild / expert
Chia-Jung Yeh
dblp:41/2536
· DBLP profile ↗
6ranked-venue papers
2as first author
0since 2021 · last 2010
0000-0001-5030-0771ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 4 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer networks
1 paper |
Physical-layer communications · 100% | |
| Theoretical computer science
2 papers |
Coding theory · 100% |
Topics — the 13 heaviest of 15, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Coding theory › channel coding
turbo codes |
0.1 | 1 | 2010 | Interblock memory for turbo coding · IEEE Trans. Commun. 2010 |
Coding theory › error-correcting codes › code construction › concatenated code construction
turbo code design |
0.1 | 1 | 2010 | Interblock memory for turbo coding · IEEE Trans. Commun. 2010 |
Physical-layer communications › MIMO › space-time coding › space-time block codes
alamouti scheme |
0.1 | 1 | 2009 | Turbo coded multiple-antenna systems for near-capacity performance · IEEE J. Sel. Areas Commun. 2009 |
Physical-layer communications
MIMO |
0.1 | 1 | 2009 | Turbo coded multiple-antenna systems for near-capacity performance · IEEE J. Sel. Areas Commun. 2009 |
Physical-layer communications › MIMO › space-time coding
space-time block codes |
0.1 | 1 | 2009 | Turbo coded multiple-antenna systems for near-capacity performance · IEEE J. Sel. Areas Commun. 2009 |
Physical-layer communications › modulation › coded modulation
turbo trellis coded modulation |
0.1 | 1 | 2009 | Turbo coded multiple-antenna systems for near-capacity performance · IEEE J. Sel. Areas Commun. 2009 |
Coding theory › error-correcting codes › decoding
iterative decoding |
0.0 | 2 | 2010 | Interblock memory for turbo coding · IEEE Trans. Commun. 2010 On trellis codes with a delay processor and a signal mapper · IEEE Trans. Commun. 2002 |
Coding theory › error-correcting codes › convolutional codes › free distance
free distance bounds |
0.0 | 1 | 2002 | On trellis codes with a delay processor and a signal mapper · IEEE Trans. Commun. 2002 |
Coding theory
trellis codes |
0.0 | 1 | 2002 | On trellis codes with a delay processor and a signal mapper · IEEE Trans. Commun. 2002 |
Coding theory › trellis codes
trellis code design |
0.0 | 1 | 2002 | On trellis codes with a delay processor and a signal mapper · IEEE Trans. Commun. 2002 |
Physical-layer communications
channel coding |
0.0 | 1 | 2009 | Turbo coded multiple-antenna systems for near-capacity performance · IEEE J. Sel. Areas Commun. 2009 |
Coding theory › error-correcting codes
convolutional codes |
0.0 | 1 | 2002 | On trellis codes with a delay processor and a signal mapper · IEEE Trans. Commun. 2002 |
Coding theory › error-correcting codes › convolutional codes › finite-length convolutional code
tailbiting code |
0.0 | 1 | 2002 | On trellis codes with a delay processor and a signal mapper · IEEE Trans. Commun. 2002 |
Methods — techniques the papers use, named apart from their topics
signal mapping · 0.1multilevel delay processing · 0.1iterative detection · 0.1interleaver design · 0.1signal mapper · 0.0iterative decoding · 0.0delay processor · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2010 | Interblock memory for turbo codingabstractWe investigate a binary code, which is implemented by serially concatenating a multiplexer, a multilevel delay processor, and a signal mapper to a binary turbo encoder. To achieve improved convergence behavior, we modify the binary code by passing only a fraction of the bits in the turbo code through the multilevel delay processor and the signal mapper. Two decoding methods are discussed and their performances are evaluated. Chia-Jung Yeh, Yeong-Luh Ueng, Mao-Chao Lin, Ming-Che Lu |
IEEE Trans. Commun. | 1 |
| 2009 | Turbo coded multiple-antenna systems for near-capacity performanceabstractFor a turbo coded BLAST (Bell LAbs Space-Time architecture) system with Nttransmit antennas and Nrreceive antennas, there is a significant gap between its detection threshold and the capacity in case Nt> Nr. In this paper, we show that by introducing a convolutional interleaver with block delay between the BLAST mapper and the turbo encoder, the threshold can be improved. Near-capacity thresholds can be achieved for some cases. To take advantage of the low detector complexity in Alamouti STBC (space-time block code), we also investigate a STBC system, which is the concatenation of the Alamouti STBC with a turbo trellis coded modulation. By using a proper labelling and adding a convolutional interleaver with block delay to such a STBC system, we achieve both lower error floors and lower thresholds. Yeong-Luh Ueng, Chia-Jung Yeh, Mao-Chao Lin, Chung-Li Wang |
IEEE J. Sel. Areas Commun. | 2 |
| 2007 | Iterative Detection and Decoding for the Near-Capacity Performance of Turbo Coded MIMO SchemesabstractIn this paper, we investigate detection-decoding algorithms for the near-capacity performances of turbo coded MIMO (multiple-input multiple-output) schemes in the fast fading channel. Both the conventional turbo coded MIMO scheme Gamma0and turbo coded MIMO scheme with interblock memory which is denoted by Gamma are investigated. Gamma is implemented by introducing some delay elements between the BLAST mapper and the turbo encoder. We show that, unlike Gamma0, the extrinsic information transfer (EXIT) curves of detector and turbo decoder in Gamma can match well. Hence, Gamma can provide error performances much better than Gamma0. In particular, we find an improved detection and decoding algorithm which can closely approach the Shannon capacity. Yeong-Luh Ueng, Chia-Jung Yeh, Chung-Li Wang, Mao-Chao Lin |
PIMRC | 2 |
| 2007 | Binary Turbo Coding with Interblock MemoryabstractWe investigate the performance of binary codes T constructed from turbo coding with interblock memory. The encoding of T is implemented by serially concatenating a multiplexer, a multilevel delay processor, and a signal mapper to the encoder of a conventional binary turbo code C. With such a construction, in T, there is some irregularity for the code bits in C. To provide more variety of irregularity, we can construct TCwhich is obtained by passing only a fraction of C through a multilevel delay processor and a signal mapper. We propose iterative decoding between adjacent codewords (IDAC), which provides error performance much better than the iterative decoding within a single codeword (IDSC). Simulation shows that T can have a lower error floor than C for either short or long code length. In some cases, TCcan provide better error floors and waterfall regions than C. Chia-Jung Yeh, Yeong-Luh Ueng, Mao-Chao Lin, Ming-Che Lu |
WCNC | 1 |
| 2006 | Coded Mimo Using Interblock MemoryabstractIn a paper authored by Ashikhmin, et. al., a low-density parity-check (LDPC) coded transmission scheme operated on multiple-input multiple-output (MIMO) fading channel was proposed, which can achieve capacity-approaching performance in case the code length is 100000 bits. In this paper, we add interblock memory to the LDPC or turbo coded MIMO system, in which only the receiver knows the channel. The simulation results show that this technique gives advantage in case that the code is short. Chung-Li Wang, Chia-Jung Yeh, Yen-Kai Chen, Mao-Chao Lin |
VTC Spring | 2 |
| 2002 | On trellis codes with a delay processor and a signal mapperabstractIt is already known that a trellis code T, which is constructed by using the encoder of a convolutional code C with short constraint length followed by a delay processor and a signal mapper, is equivalent to a trellis code with large constraint length. In this paper, we derive a new lower bound on the free distance of T, which, in some cases, is better than the previously derived bound. Moreover, instead of the decoding used in earlier publications, we apply iterative decoding on both tailbiting and zero-tail representations of T to take advantage of the new lower bound and, in the meantime, to decrease the associated error coefficient caused by the decoding used in earlier publications. Comparisons among various designs of such a trellis code and some well-known coding methods are also provided. Yeong-Luh Ueng, Chia-Jung Yeh, Mao-Chao Lin |
IEEE Trans. Commun. | 2 |