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Shankar Pennathur

dblp:41/3487 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1992
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 50% Electronic design automation · 50%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › semiconductor devices
charge-coupled devices
0.011992
Simulation of charge transfer in GaAs Cermet-Gate CCDs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992
Electronic design automation › technology computer-aided design
device simulation
0.011992
Simulation of charge transfer in GaAs Cermet-Gate CCDs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1992

Methods — techniques the papers use, named apart from their topics

finite difference scheme · 0.0
YearPublicationVenuePosition
1992 Simulation of charge transfer in GaAs Cermet-Gate CCDs
abstract
Computer simulations of charge transport in GaAs cermet-gate CCDs are discussed. A finite difference scheme is used to simulate charge evolution between successive clock phases. Epi-grown and ion-implanted channels are considered. It is shown that charge transport and hence the transfer inefficiencies of these devices depend on the relative importance of the drift field and the self-induced field more than the diffusion contribution. The one-dimensional scheme used for the simulation of charge transfer is simple and computationally less intensive than a rigorous two-dimensional approach, but is qualitatively as effective.>
Shankar Pennathur, Harry H. L. Kwok
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1