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Pu Liu

dblp:41/6238 · DBLP profile ↗
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25ranked-venue papers
11as first author
2since 2021 · last 2024
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 14 · 6 first-authorArtificial intelligence and machine learning · 2 · 1 first-authorComputer networks · 2 · 1 since 2021Software engineering, systems software and programming languages · 2 · 2 first-authorApplied, interdisciplinary, general and emerging computing · 2 · 1 first-author · 1 since 2021Databases, data management, data science and information retrieval · 1Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
6 papers
Electronic design automation · 56% Energy-efficient computing · 19% Performance modeling and evaluation · 18%
Databases, data mining, and information retrieval
1 paper
Graph data management · 61% Indexing and storage engines · 30% Query processing and optimization · 9%
Computer networks
2 papers
Routing and switching · 40% Network performance modeling · 35% Internet architecture and protocols · 24%

Topics — the 23 heaviest of 25, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › circuit simulation
model order reduction
0.232007
TermMerg: An Efficient Terminal-Reduction Method for Interconnect Circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2007
SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits · DAC 2007
Wideband passive multiport model order reduction and realization of RLCM circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Indexing and storage engines
bitmap index
0.212013
TripleBit: a Fast and Compact System for Large Scale RDF Data · Proc. VLDB Endow. 2013
Graph data management
RDF data management
0.212013
TripleBit: a Fast and Compact System for Large Scale RDF Data · Proc. VLDB Endow. 2013
Graph data management › RDF data management
RDF storage and indexing
0.212013
TripleBit: a Fast and Compact System for Large Scale RDF Data · Proc. VLDB Endow. 2013
Electronic design automation › circuit simulation › model order reduction
balanced truncation
0.112007
SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits · DAC 2007
Electronic design automation
circuit simulation
0.112007
SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits · DAC 2007
Electronic design automation › circuit simulation › model order reduction
passivity-preserving reduction
0.112007
TermMerg: An Efficient Terminal-Reduction Method for Interconnect Circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2007
Electronic design automation
VLSI interconnect analysis
0.112007
TermMerg: An Efficient Terminal-Reduction Method for Interconnect Circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2007
Energy-efficient computing › thermal management
dynamic thermal management
0.112006
Fast Thermal Simulation for Runtime Temperature Tracking and Management · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Electronic design automation
interconnect modeling
0.112006
Wideband passive multiport model order reduction and realization of RLCM circuits · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Energy-efficient computing
power modeling
0.112006
A systematic method for functional unit power estimation in microprocessors · DAC 2006
Performance modeling and evaluation
simulation
0.112006
Fast Thermal Simulation for Runtime Temperature Tracking and Management · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Energy-efficient computing
thermal management
0.112006
Fast Thermal Simulation for Runtime Temperature Tracking and Management · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Performance modeling and evaluation › simulation
thermal simulation
0.112006
Fast Thermal Simulation for Runtime Temperature Tracking and Management · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2006
Performance modeling and evaluation
benchmarking
0.112005
A Benchmark Suite for SOAP-based Communication in Grid Web Services · SC 2005
Query processing and optimization › query optimization › join ordering
join optimization
0.012013
TripleBit: a Fast and Compact System for Large Scale RDF Data · Proc. VLDB Endow. 2013
Internet architecture and protocols
web services
0.012005
A Benchmark Suite for SOAP-based Communication in Grid Web Services · SC 2005
Distributed systems
grid computing
0.012005
A Benchmark Suite for SOAP-based Communication in Grid Web Services · SC 2005
Routing and switching
input-queued switch
0.011994
Maximum throughput of an input queueing packet switch with two priority classes · IEEE Trans. Commun. 1994
Routing and switching
packet switching
0.011994
Maximum throughput of an input queueing packet switch with two priority classes · IEEE Trans. Commun. 1994
Network performance modeling › queueing analysis
priority queueing
0.011994
Maximum throughput of an input queueing packet switch with two priority classes · IEEE Trans. Commun. 1994
Network performance modeling
queueing analysis
0.011994
Maximum throughput of an input queueing packet switch with two priority classes · IEEE Trans. Commun. 1994
Routing and switching
switch scheduling
0.011994
Maximum throughput of an input queueing packet switch with two priority classes · IEEE Trans. Commun. 1994

Methods — techniques the papers use, named apart from their topics

query optimization · 0.2bit matrix indexing · 0.2moment matching · 0.1singular value decomposition · 0.1second-order balanced truncation · 0.1k-means clustering · 0.1congruency transformation · 0.1spectrum analysis · 0.1power phase analysis · 0.1pole searching · 0.1piecewise constant power input · 0.1linear system of equations · 0.1benchmarking · 0.1simulation · 0.0queueing analysis · 0.0
YearPublicationVenuePosition
2024 Seismic Data Separation Based on the Equidistant-Spectral Constrained Morphological Component Analysis
abstract
During seismic acquisition, the received seismic data typically comprise many components, such as effective reflections and various interferences. Some components, such as industrial electrical interference and traffic vibrations, manifest as the equidistant narrowband discrete spectra (ENBD-spectra) in the frequency domain. Morphological component analysis (MCA) is widely used for separating different component from complicated seismic data. Therefore, it has been successfully used to extract the narrowband components from seismic data. However, the conventional MCA method overlooks equidistant feature of ENBD-spectra component in seismic data separation. In this study, we propose an improved MCA method that uses the interval between neighboring spectrum peaks as a constraint to separating the data with ENBD-spectra component. Two types of seismic datasets are used to show the proposed MCA’s effectiveness. The first type of dataset contains industrial electrical interference, while another type of dataset contains high-speed train (HST)-induced seismic signals. Both synthetic data examples and real data examples show that the proposed method has better performance in separating the seismic data with ENBD-spectra component and keeping the fidelity of separation compared with the conventional MCA method.
Chunmeng Cui, Dawei Liu 0006, Pu Liu, Zhensheng Shi
IEEE Trans. Geosci. Remote. Sens.4
2021 Ensemble Meteorological Cloud Classification Meets Internet of Dependable and Controllable Things
abstract
Advances in Internet of Things (IoT) and cloud/edge computing systems could precisely monitor the meteorological elements and environmental conditions. Remote automated observation system (RAOS) makes the full use of IoT to communicate with other sensors, enabling the active responses from passive devices for smart weather. Cloud observation and classification have been regarded as a successful application that could automatically perform emergency tasks in RAOS. However, with the increasing growth of resource exploitation, the performance of communications among the automatic observation platforms, and the efficiency of task allocation among them has become a critical challenge. In this article, an ensemble learning method and resource allocation scheme are proposed to realize the cloud observation and classification with the help of reliable and controllable infrastructures. On the one hand, several ensemble methods, like Bagging, AdaBoost, and Snapshot are selected as a base classifier to capture the cross-semantic and structure features of cloud, while applying them to the ensemble using convolutional neural networks with different base learners and residual neural networks with different depths. on the other hand, a particular cloud-edge distributed framework is proposed for cloud classification approach based on the intelligent network, to overcome the difficulty in the massive data transmission. The experimental results verify that the proposed ensemble approach achieves high accuracy of cloud classification, and effectively improves the number of allocated tasks. Ensemble methods can generate a more accurate prediction than any single classifier or the majority algorithms. It consistently yields lower error rates than single state-of-the-art models at no additional training cost.
Jinglin Zhang 0003, Pu Liu, Feng Zhang 0041, Hironobu Iwabuchi, Antonio Artur de H. e Ayres de Moura, Victor Hugo C. de Albuquerque
IEEE Internet Things J.2
2014 Fingertip force estimation from forearm muscle electrical activity
abstract
Existing commercial hand prostheses can be controlled from the electrical activity (electromyogram or EMG) of remnant muscle tissue within the forearm, but are limited in function to one degree of freedom of proportional control. In a pilot study (N=3 subjects), we used least squares estimation to identify a model between forearm electrical activity recorded by high-resolution (64 channel) electrode arrays (applied over the flexor and, separately, extensor muscles of the forearm) to force in the four fingertips. Average errors ranged from 4.21 to 10.20 %MVCF(flexion maximum voluntary contraction), depending on the muscle contraction task performed, number of EMG electrodes in the model and the electrode montage selected. Results suggest that, at least for intact subjects, 2-4 degrees of freedom of proportional control are available from the EMG signals of the forearm.
Pu Liu, François Martel, Denis Rancourt, Edward A. Clancy, D. Richard Brown III
ICASSP1
2013 TripleBit: a Fast and Compact System for Large Scale RDF Data
abstract
The volume of RDF data continues to grow over the past decade and many known RDF datasets have billions of triples. A grant challenge of managing this huge RDF data is how to access this big RDF data efficiently. A popular approach to addressing the problem is to build a full set of permutations of (S, P, O) indexes. Although this approach has shown to accelerate joins by orders of magnitude, the large space overhead limits the scalability of this approach and makes it heavyweight. In this paper, we present TripleBit, a fast and compact system for storing and accessing RDF data. The design of TripleBit has three salient features. First, the compact design of TripleBit reduces both the size of stored RDF data and the size of its indexes. Second, TripleBit introduces two auxiliary index structures, ID-Chunk bit matrix and ID-Predicate bit matrix, to minimize the cost of index selection during query evaluation. Third, its query processor dynamically generates an optimal execution ordering for join queries, leading to fast query execution and effective reduction on the size of intermediate results. Our experiments show that TripleBit outperforms RDF-3X, MonetDB, BitMat on LUBM, UniProt and BTC 2012 benchmark queries and it offers orders of mangnitude performance improvement for some complex join queries.
Pingpeng Yuan, Pu Liu, Buwen Wu, Hai Jin 0001, Wenya Zhang, Ling Liu 0001
Proc. VLDB Endow.2
2010 Bridging the Missing Link of Cloud Data Storage Security in AWS
abstract
The data that is stored and/or transmitted on the Internet has been called "the blood of the IT". Along with the infrastructure and network based applications, data storage has been recognized as one of the major dimensions of information technology. The prosperity of Cloud Computing requires the moving from server-attached storage to distributed storage. Along with variant advantages, the distributed storage also poses new challenges in creating a secure and reliable data storage and access facility over insecure or unreliable service providers. The security of data stored in the cloud is one of the challenges to be addressed before the novel pay-as-you-go business model is applied widely. In this research, we revealed the vulnerability in the Amazon's AWS cloud and discussed technical approaches towards potential effective solutions.
Yu Chen 0002, Pu Liu
CCNC3
2009 A Self-Organizing Algorithm for Modeling Protein Loops
abstract
Protein loops, the flexible short segments connecting two stable secondary structural units in proteins, play a critical role in protein structure and function. Constructing chemically sensible conformations of protein loops that seamlessly bridge the gap between the anchor points without introducing any steric collisions remains an open challenge. A variety of algorithms have been developed to tackle the loop closure problem, ranging from inverse kinematics to knowledge-based approaches that utilize pre-existing fragments extracted from known protein structures. However, many of these approaches focus on the generation of conformations that mainly satisfy the fixed end point condition, leaving the steric constraints to be resolved in subsequent post-processing steps. In the present work, we describe a simple solution that simultaneously satisfies not only the end point and steric conditions, but also chirality and planarity constraints. Starting from random initial atomic coordinates, each individual conformation is generated independently by using a simple alternating scheme of pairwise distance adjustments of randomly chosen atoms, followed by fast geometric matching of the conformationally rigid components of the constituent amino acids. The method is conceptually simple, numerically stable and computationally efficient. Very importantly, additional constraints, such as those derived from NMR experiments, hydrogen bonds or salt bridges, can be incorporated into the algorithm in a straightforward and inexpensive way, making the method ideal for solving more complex multi-loop problems. The remarkable performance and robustness of the algorithm are demonstrated on a set of protein loops of length 4, 8, and 12 that have been used in previous studies.
Pu Liu, Fangqiang Zhu, Dmitrii N. Rassokhin, Dimitris K. Agrafiotis
PLoS Comput. Biol.1
2008 FEKIS: a fast architecture-level thermal analyzer for online thermal regulation
abstract
Owning to increasing power consumption and the corresponding heat dissipated on die, efficient on-chip temperature regulation becomes imperative for today's high performance microprocessors. Temperature tracking based on the on-chip thermal sensors is not sufficient as the temperature hot spots keep changing with the load. One way to mitigate this problem is by means of software sensors, where temperature of any location is computed based on realtime power information and calibrated with the physical sensors. In this paper, we present a very efficient numerical thermal analyzer, which is suitable for fast temperature tracking and online thermal regulation. The proposed method, called FEKIS, combines two existing numerical techniques: extended Krylov subspace reduction technique to reduce the thermal circuit complexity and large-step integration method to exploits the piecewise constant power input traces, which is typical in the power traces at the architecture level. Experimental results show that FEKIS runs 10X faster than the precise time-step integration method only and $1000X$ faster than the traditional numerical integration method with high accuracy.
Pu Liu, Sheldon X.-D. Tan, Wei Wu 0024, Murli Tirumala
ACM Great Lakes Symposium on VLSI1
2008 An efficient terminal and model order reduction algorithm
Pu Liu, Sheldon X.-D. Tan, Boyuan Yan, Bruce McGaughy
Integr.1
2007 Passive Interconnect Macromodeling Via Balanced Truncation of Linear Systems in Descriptor Form
abstract
In this paper, we present a novel passive model order reduction (MOR) method via projection-based truncated balanced realization method, PriTBR, for large RLC interconnect circuits. Different from existing passive truncated balanced realization (TBR) methods where numerically expensive Lur'e or algebraic Riccati (ARE's) equations are solved, the new method performs balanced truncation on linear system in descriptor form by solving generalized Lyapunov equations. Passivity preservation is achieved by congruence transformation instead of simple truncations. For the first time, passive model order reduction is achieved by combining Lyapunov equation based TBR method with congruence transformation. Compared with existing passive TBR, the new technique has the same accuracy and is numerically reliable, less expensive. In addition to passivity-preserving, it can be easily extended to preserve structure information inherent to RLC circuits, like block structure, reciprocity and sparsity. PriTBR can be applied as a second MOR stage combined with Krylov-subspace methods to generate a nearly optimal reduced model from a large scale interconnect circuit while passivity, structure, and reciprocity are preserved at the same time. Experimental results demonstrate the effectiveness of the proposed method and show PriTBR and its structure-preserving version, SP-PriTBR, are superior to existing passive TBR and Krylov-subspace based moment-matching methods.
Boyuan Yan, Sheldon X.-D. Tan, Pu Liu, Bruce McGaughy
ASP-DAC3
2007 SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits
abstract
RLC circuits have been shown to be better formulated as second-order systems instead of first-order systems. The corresponding model order reduction techniques for second- order systems have been developed. However, existing techniques are mainly based on moment-matching concept. While suitable for the reduction of large-scale circuits, those approaches cannot generate reduced models as compact as desired. To achieve smaller models with better error control, a novel technique, SBPOR (Second-order Balanced truncation for Passive Order Reduction), is proposed in this paper, which is the first second-order balanced truncation method proposed for passive reduction of RLC circuits. SBPOR is superior to the pioneering work in the control community because second-order systems can be balanced via congruency transformation without any accuracy loss. In addition, compared with the first-order balanced truncation approaches, SBPOR is a better choice for RLC reduction. SBPOR preserves not only passivity but also the structure information inherent to RLC circuits, which is a special need for RLC reduction. In addition, SBPOR is computationally more efficient as it only needs to solve one linear matrix equation instead of two quadratic matrix equations.
Boyuan Yan, Sheldon X.-D. Tan, Pu Liu, Bruce McGaughy
DAC3
2007 Stochastic extended Krylov subspace method for variational analysis of on-chip power grid networks
abstract
In this paper, we propose a novel stochastic method for analyzing the voltage drop variations of on-chip power grid networks with log-normal leakage current variations. The new-method, called StoEKS, applies Hermite polynomial chaos (PC) to represent the random variables in both power grid networks and input leakage currents. But different from the existing Hermit PC based stochastic simulation method, extended Krylov subspace method (EKS) is employed to compute variational responses using the augmented matrices consisting of the coefficients of Hermite polynomials. Our contribution lies in the combination of the statistical spectrum method with the extended Krylov subspace method to fast solve the variational circuit equations for the first time. Experimental results show that the proposed method is about two-order magnitude faster than the existing Hermite PC based simulation method and more order of magnitudes faster than Monte Carlo methods with marginal errors. StoEKS also can analyze much larger circuits than the exiting Hermit PC based methods.
Ning Mi, Sheldon X.-D. Tan, Pu Liu, Yici Cai, Xianlong Hong
ICCAD3
2007 Uniform Dynamic Deployment of Web and Grid Services
abstract
The Web services resource framework (WSRF) has redefined grid computing standards, making Web services more suitable for grid applications by adding persistent state management. However, it is still difficult to build, deploy, and evolve such services, since different Web and grid services containers require that the services they host be written in specific languages, to target particular internal interfaces for state management. Therefore, services must be built and deployed differently for each hosting environment. This paper describes uniform dynamic service code deployment on three Web services containers (namely, Tomcat, ASP.NET and a gSOAP based C++ container), and two grid services containers (namely, GT4 and WSRF.NET). Containers receive the code in an XML-based standard intermediate form, and then generate container-specific native code in different languages, without exposing these details to applications and grid services programmers. The dynamically deployed code can access state managed by the hosting container, can utilize functionalities exposed by statically deployed services, and can communicate with other dynamically deployed modules, running either in the same container or in different containers. A performance study shows that the newly deployed mobile code can run nearly as efficiently as it would if it had been deployed statically, through container-specific mechanisms.
Pu Liu, Michael J. Lewis
ICWS1
2007 TermMerg: An Efficient Terminal-Reduction Method for Interconnect Circuits
abstract
In this paper, a novel method to efficiently reduce the terminal number of general linear-interconnect circuits with a large number of input or output terminals considering delay uncertainty is proposed. Our new algorithm is motivated by the fact that terminal reduction can lead to a more compact order-reduced model and the observation that very large-scale integration interconnect circuits have many similar terminals in terms of their timing and delay metrics due to their closeness in structure or due to the mathematical discretization using meshing in finite-difference or finite-element scheme during the extraction process. The new method, called TermMerg ( Proc. ICCAD, p. 821, 2005), is based on the moments of the circuits as the metrics for the timing or delay. It then employs a singular-value-decomposition (SVD) method to determine the best number of clusters based on the low-rank approximation. After this, the -means clustering algorithm is used to cluster the moments of the terminals into the different clusters. The proposed method can work with any passive-model order reduction and ensure the passive models. In contrast, we show that singular value decomposition model order reduction (SVDMOR) does not generate passive models in general. Passivity enforcement in SVDMOR will significantly hamper the terminal-reduction effectiveness. Experimental results on a number of real industry interconnect circuits demonstrate the effectiveness of the proposed method and show also that the proposed method is more accurate than SVDMOR when the used moment matrix does not give good terminal correlations.
Pu Liu, Sheldon X.-D. Tan, Bruce McGaughy, Lifeng Wu 0002, Lei He 0001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
2007 Efficient power modeling and software thermal sensing for runtime temperature monitoring
abstract
The evolution of microprocessors has been hindered by increasing power consumption and heat dissipation on die. An excessive amount of heat creates reliability problems, reduces the lifetime of a processor, and elevates the cost of cooling and packaging considerably. It is therefore imperative to be able to monitor the temperature variations across the die in a timely and accurate manner. Most current techniques rely on on-chip thermal sensors to report the temperature of the processor. Unfortunately, significant variation in chip temperature both spatially and temporally exposes the limitation of the sensors. We present a compensating approach to tracking chip temperature through an OS resident software module that generates live power and thermal profiles of the processor. We developed such a software thermal sensor (STS) in a Linux system with a Pentium 4 Northwood core. We employed highly efficient numerical methods in our model to minimize the overhead of temperature calculation. We also developed an efficient algorithm for functional unit power modeling. Our power and thermal models are calibrated and validated against on-chip sensor readings, thermal images of the Northwood heat spreader, and the thermometer measurements on the package. The resulting STS offers detailed power and temperature breakdowns of each functional unit at runtime, enabling more efficient online power and thermal monitoring and management at a higher level, such as the operating system.
Wei Wu 0024, Lingling Jin, Jun Yang 0002, Pu Liu, Sheldon X.-D. Tan
ACM Trans. Design Autom. Electr. Syst.4
2006 A systematic method for functional unit power estimation in microprocessors
abstract
We present a new method for mathematically estimating the active unit power of functional units in modern microprocessors such as the Pentium 4 family. Our method leverages the phasic behavior in power consumption of programs, and captures as many power phases as possible to form a linear system of equations such that the functional unit power can be solved. Our experiment results on a real Pentium 4 processor show that power estimations attained as such agree with the measured power very well, with deviations less than 5% only.
Wei Wu 0024, Lingling Jin, Jun Yang 0002, Pu Liu, Sheldon X.-D. Tan
DAC4
2006 Fast Thermal Simulation for Runtime Temperature Tracking and Management
abstract
As the power density increases exponentially, the runtime regulation of operating temperature by dynamic thermal management (DTM) becomes necessary. This paper proposes two novel approaches to the thermal analysis at the chip architecture level for efficient DTM. The first method, i.e., thermal moment matching with spectrum analysis, is based on observations that the power consumption of architecture-level modules in microprocessors running typical workloads presents a strong nature of periodicity. Such a feature can be exploited by fast spectrum analysis in the frequency domain for computing steady-state response. The second method, i.e., thermal moment matching based on piecewise constant power inputs, is based on the observation that the average power consumption of architecture-level modules in microprocessors running typical workloads determines the trend of temperature variations. As a result, using piecewise constant average power inputs can further speed up the thermal analysis. To obtain transient temperature changes due to the initial condition and constant/average power inputs, numerically stable moment matching methods with enhanced pole searching are carried out to speed up online temperature tracking with high accuracy and low overhead. The resulting thermal analysis algorithm has a linear time complexity in runtime setting when the average power inputs are applied. Experimental results show that the resulting thermal analysis algorithms lead to 10times-100times speedup over the traditional integration-based transient analysis with small accuracy loss
Pu Liu, Lingling Jin, Wei Wu 0024, Sheldon X.-D. Tan, Jun Yang 0002
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
2006 Wideband passive multiport model order reduction and realization of RLCM circuits
abstract
This paper presents a novel compact passive modeling technique for high-performance RF passive and interconnect circuits modeled as high-order resistor-inductor-capacitor-mutual inductance circuits. The new method is based on a recently proposed general s-domain hierarchical modeling and analysis method and vector potential equivalent circuit model for self and mutual inductances. Theoretically, this paper shows that s-domain hierarchical reduction is equivalent to implicit moment matching at around s=0 and that the existing hierarchical reduction method by one-point expansion is numerically stable for general tree-structured circuits. It is also shown that hierarchical reduction preserves the reciprocity of passive circuit matrices. Practically, a hierarchical multipoint reduction scheme to obtain accurate-order reduced admittance matrices of general passive circuits is proposed. A novel explicit waveform-matching algorithm is proposed for searching dominant poles and residues from different expansion points based on the unique hierarchical reduction framework. To enforce passivity, state-space-based optimization is applied to the model order reduced admittance matrix. Then, a general multiport network realization method to realize the passivity-enforced reduced admittance based on the relaxed one-port network synthesis technique using Foster's canonical form is proposed. The resulting modeling algorithm can generate the multiport passive SPICE-compatible model for any linear passive network with easily controlled model accuracy and complexity. Experimental results on an RF spiral inductor and a number of high-speed transmission line circuits are presented. In comparison with other approaches, the proposed reduction is as accurate as passive reduced-order interconnect macromodeling algorithm in the high-frequency domain due to the enhanced multipoint expansion, but leads to smaller realized circuit models. In addition, under the same reduction ratio, realized models by the new method have less error compared with reduced circuits by time-constant-based reduction techniques in time domain.
Zhenyu Qi 0002, Hao Yu 0001, Pu Liu, Sheldon X.-D. Tan, Lei He 0001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3
2005 Fast thermal simulation for architecture level dynamic thermal management
abstract
As power density increases exponentially, runtime regulation of operating temperature by dynamic thermal managements becomes necessary. This paper proposes a novel approach to the thermal analysis at chip architecture level for efficient dynamic thermal management. Our new approach is based on the observation that the power consumption of architecture level modules in microprocessors running typical workloads presents strong nature of periodicity. Such a feature can be exploited by fast spectrum analysis in frequency domain for computing steady state response. To obtain the transient temperature changes due to initial condition and constant power inputs, numerically stable moment matching approach is carried out. The total transient responses is the addition of the two simulation results. The resulting fast thermal analysis algorithm leads to at least 10/spl times/-100/spl times/ speedup over traditional integration-based transient analysis with small accuracy loss.
Pu Liu, Zhenyu Qi 0002, Lingling Jin, Wei Wu 0024, Sheldon X.-D. Tan, Jun Yang 0002
ICCAD1
2005 An efficient method for terminal reduction of interconnect circuits considering delay variations
abstract
This paper proposes a novel method to efficiently reduce the terminal number of general linear interconnect circuits with a large number of input and/or output terminals considering delay variations. Our new algorithm is motivated by the fact that VLSI interconnect circuits have many similar terminals in terms of their timing and delay metrics due to their closeness in structure or due to mathematic approximation using meshing in finite difference or finite element scheme during the extraction process. By allowing some delay tolerance or variations, we can reduce many similar terminals and keep a small number of representative terminals. After terminal reduction, traditional model order reduction methods can achieve more compact models and improve simulation efficiency. The new method, TermMerg, is based on the moments of the circuits as the metrics for the timing or delay. It then employs singular value decomposition (SVD) method to determine the optimum number of clusters based on the low-rank approximation. After this, the K-means clustering algorithm is used to cluster the moments of the terminals into different clusters. Experimental results on a number of real industry interconnect circuits demonstrate the effectiveness of the proposed method.
Pu Liu, Sheldon X.-D. Tan, Zhenyu Qi 0002, Bruce McGaughy, Lei He 0001
ICCAD1
2005 Efficient Thermal Simulation for Run-Time Temperature Tracking and Management
abstract
As power density increases exponentially, run-time regulation of operating temperature by dynamic thermal management becomes imperative. This paper proposes a novel approach to real-time thermal estimation at chip level for efficient dynamic thermal management in lieu of the thermal sensors, which are erroneous and having longer delays. Our new approach is based on the observation that the average power consumption of architecture level modules in microprocessors running typical workloads determines the trend of temperature variations. Such a feature can be exploited by applying fast moment matching technique in frequency domain. To obtain the transient temperature changes due to initial condition and constant power input pattern, numerically stable moment matching approach is carried out to speed up on-line temperature tracking with high accuracy and low overhead. The resulting fast thermal analysis algorithm has linear time complexity in run-time setting and leads to about two orders of magnitude speed-up over traditional integration-based transient analysis. The average maximum error under running typical benchmarks is only about 0.37/spl deg/C as compared to other well-accepted simulation tools.
Pu Liu, Zhenyu Qi 0002, Lingling Jin, Wei Wu 0024, Sheldon X.-D. Tan, Jun Yang 0002
ICCD2
2005 Mobile Code Enabled Web Services
abstract
A primary benefit of Web services is that they provide a uniform implementation-independent mechanism for accessing distributed services. Building and deploying such services do not benefit from the same advantages, however. Different Web services containers are implemented in different programming languages, with different constraints and requirements placed on the programmer. Moreover, client side programmers must use the Web service interface specified by the service developer. Therefore, the kinds of applications and uses for a Web service are unnecessarily restrictive, constrained by the granularity of access defined by the interface and by the characteristics of the service functions. This paper describes an approach that addresses both of these drawbacks by enabling Web service containers with the ability to accept new mobile code on the fly, and to run it within the containers, providing direct local access to the containers' other services. The code can be specified in a small simple language (a subset of C), and translated and passed to the container in a common XML-based intermediate language called X#. This approach effectively removes the dependence on any single implementation environment. Our prototype implementation for two different containers demonstrates the feasibility of the approach, which represents a first step toward write-once deploy-anywhere Web services.
Pu Liu, Michael J. Lewis
ICWS1
2005 A Benchmark Suite for SOAP-based Communication in Grid Web Services
abstract
The convergence of Web services and grid computing has promoted SOAP, a widely used Web services protocol, into a prominent protocol for a wide variety of grid applications. These applications differ widely in the characteristics of their respective SOAP messages, and also in their performance requirements. To make the right decisions, an application developer must thus understand the complex dependencies between the SOAP implementation and the application. We propose a standard benchmark suite for quantifying, comparing, and contrasting the performance of SOAP implementations under a wide range of representative use cases. The benchmarks are defined by a set of WSDL documents. To demonstrate the utility of the benchmarks and to provide a snapshot of the current SOAP implementation landscape, we report the performance of many different SOAP implementations (gSOAP, AxisJava, XSUL and bSOAP) on the benchmarks, and draw conclusions about their current performance characteristics.
Michael R. Head, Madhusudhan Govindaraju, Aleksander Slominski, Pu Liu, Nayef Abu-Ghazaleh, Robert A. van Engelen, Kenneth Chiu, Michael J. Lewis
SC4
2002 A New Asynchronous Parallel Evolutionary Algorithm for Function Optimization
Pu Liu, Francis C. M. Lau 0001, Michael J. Lewis, Cho-Li Wang
PPSN1
2000 Asynchronous parallelization of Guo's algorithm for function optimization
abstract
Recently Tao Guo (1999) proposed a stochastic search algorithm in his PhD thesis for solving function optimization problems. He combined the subspace search method (a general multi-parent recombination strategy) with the population hill-climbing method. The former keeps a global search for the overall situation, and the latter maintains the convergence of the algorithm. Guo's algorithm has many advantages, such as the simplicity of its structure, the high accuracy of its results, the wide range of its applications, and the robustness of its use. In this paper a preliminary theoretical analysis of the algorithm is given and some numerical experiments are performed using Guo's algorithm to demonstrate the theoretical results. Three asynchronous parallel algorithms with different granularities for MIMD machines are designed by parallelizing Guo's algorithm.
Lishan Kang, Zhuo Kang, Pu Liu
CEC4
1994 Maximum throughput of an input queueing packet switch with two priority classes
abstract
The maximum throughput of an N/spl times/N nonblocking packet switch with input queues and two priority classes is analyzed. Packets are of fixed length and the switch operation is slotted. Packets of both priority classes are queued when waiting for service. High-priority packets preempt low-priority ones and move ahead of all low-priority packets waiting in the queue. A new method of analysis is employed. The calculated results of the maximum throughput obtained are close to the simulation results.>
Lemin Li, Caijun Hu, Pu Liu
IEEE Trans. Commun.3