EDBT 2026 Demo / reviewers in the wild / expert
Stephen R. Beard
dblp:41/9698
· DBLP profile ↗
7ranked-venue papers
0as first author
0since 2021 · last 2019
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 6Software engineering, systems software and programming languages · 5
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
3 papers |
Processor architecture and microarchitecture · 66% Hardware accelerators and domain-specific architectures · 22% GPUs and heterogeneous computing · 12% | |
| Network and information security
1 paper |
Hardware security and side channels · 77% Systems and software security · 23% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 77% Runtime systems and virtual machines · 23% |
Topics — the 7 heaviest of 9, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware security and side channels › hardware security primitives
hardware root of trust |
0.4 | 1 | 2019 | Architectural Support for Containment-based Security · ASPLOS 2019 |
Processor architecture and microarchitecture › hardware-assisted security
secure architecture |
0.4 | 1 | 2019 | Architectural Support for Containment-based Security · ASPLOS 2019 |
Processor architecture and microarchitecture
out-of-order execution |
0.2 | 1 | 2015 | DynaSpAM: dynamic spatial architecture mapping using out of order instruction schedules · ISCA 2015 |
Hardware accelerators and domain-specific architectures
spatial architecture |
0.2 | 1 | 2015 | DynaSpAM: dynamic spatial architecture mapping using out of order instruction schedules · ISCA 2015 |
GPUs and heterogeneous computing › GPU communication
CPU-GPU communication |
0.1 | 1 | 2011 | Automatic CPU-GPU communication management and optimization · PLDI 2011 |
Systems and software security › trusted computing
trusted execution |
0.1 | 1 | 2019 | Architectural Support for Containment-based Security · ASPLOS 2019 |
Processor architecture and microarchitecture
instruction scheduling |
0.1 | 1 | 2015 | DynaSpAM: dynamic spatial architecture mapping using out of order instruction schedules · ISCA 2015 |
Methods — techniques the papers use, named apart from their topics
supply chain diversification · 0.8formal verification · 0.8runtime management · 0.2compiler transformation · 0.2speculation · 0.2dynamic mapping · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2019 | Architectural Support for Containment-based SecurityabstractSoftware security techniques rely on correct execution by the hardware. Securing hardware components has been challenging due to their complexity and the proportionate attack surface they present during their design, manufacture, deployment, and operation. Recognizing that external communication represents one of the greatest threats to a system's security, this paper introduces the TrustGuard containment architecture. TrustGuard contains malicious and erroneous behavior using a relatively simple and pluggable gatekeeping hardware component called the Sentry. The Sentry bridges a physical gap between the untrusted system and its external interfaces. TrustGuard allows only communication that results from the correct execution of trusted software, thereby preventing the ill effects of actions by malicious hardware or software from leaving the system. The simplicity and pluggability of the Sentry, which is implemented in less than half the lines of code of a simple in-order processor, enables additional measures to secure this root of trust, including formal verification, supervised manufacture, and supply chain diversification with less than a 15% impact on performance. Hansen Zhang, Soumyadeep Ghosh, Jordan Fix, Sotiris Apostolakis, Stephen R. Beard, Nayana P. Nagendra, Taewook Oh, David I. August |
ASPLOS | 5 |
| 2018 | MemoDyn: exploiting weakly consistent data structures for dynamic parallel memoizationabstractSeveral classes of algorithms for combinatorial search and optimization problems employ memoization data structures to speed up their serial convergence. However, accesses to these data structures impose dependences that obstruct program parallelization. Such programs often continue to function correctly even when queries into these data structures return a partial view of their contents. Weakening the consistency of these data structures can unleash new parallelism opportunities, potentially at the cost of additional computation. These opportunities must, therefore, be carefully exploited for overall speedup. This paper presents MemoDyn, a framework for parallelizing loops that access data structures with weakly consistent semantics. MemoDyn provides programming abstractions to express weak semantics, and consists of a parallelizing compiler and a runtime system that automatically and adaptively exploit the semantics for optimized parallel execution. Evaluation of MemoDyn shows that it achieves efficient parallelization, providing significant improvements over competing techniques in terms of both runtime performance and solution quality. Prakash Prabhu, Stephen R. Beard, Sotiris Apostolakis, Ayal Zaks, David I. August |
PACT | 2 |
| 2017 | A Generalized Framework for Automatic Scripting Language ParallelizationabstractComputational scientists are typically not expert programmers, and thus work in easy to use dynamic languages. However, they have very high performance requirements, due to their large datasets and experimental setups. Thus, the performance required for computational science must be extracted from dynamic languages in a manner that is transparent to the programmer. Current approaches to optimize and parallelize dynamic languages, such as just-in-time compilation and highly optimized interpreters, require a huge amount of implementation effort and are typically only effective for a single language. However, scientists in different fields use different languages, depending upon their needs.This paper presents techniques to enable automatic extraction of parallelism within scripts that are universally applicable across multiple different dynamic scripting languages. The key insight is that combining a script with its interpreter, through program specialization techniques, will embed any parallelism within the script into the combined program that can then be extracted via automatic parallelization techniques. Additionally, this paper presents several enhancements to existing speculative automatic parallelization techniques to handle the dependence patterns created by the specialization process. A prototype of the proposed technique, called Partial Evaluation with Parallelization (PEP), is evaluated against two open-source script interpreters with 6 input linear algebra kernel scripts each. The resulting geomean speedup of 5.10× on a 24-core machine shows the potential of the generalized approach in automatic extraction of parallelism in dynamic scripting languages. Taewook Oh, Stephen R. Beard, Nick P. Johnson, Sergiy Popovych, David I. August |
PACT | 2 |
| 2017 | A collaborative dependence analysis framework
Nick P. Johnson, Jordan Fix, Stephen R. Beard, Taewook Oh, Thomas B. Jablin, David I. August |
CGO | 3 |
| 2015 | DynaSpAM: dynamic spatial architecture mapping using out of order instruction schedulesabstractSpatial architectures are more efficient than traditional Out-of-Order (OOO) processors for computationally intensive programs. However, spatial architectures require mapping a program, either statically or dynamically, onto the spatial fabric. Static methods can generate efficient mappings, but they cannot adapt to changing workloads and are not compatible across hardware generations. Current dynamic methods are adaptive and compatible, but do not optimize as well due to their limited use of speculation and small mapping scopes. To overcome the limitations of existing dynamic mapping methods for spatial architectures, while minimizing the inefficiencies inherent in OOO superscalar processors, this paper presents DynaSpAM (Dynamic Spatial Architecture Mapping), a framework that tightly couples a spatial fabric with an OOO pipeline. DynaSpAM coaxes the OOO processor into producing an optimized mapping with a simple modification to the processor's scheduler. The insight behind DynaSpAM is that today's powerful OOO processors do for themselves most of the work necessary to produce a highly optimized mapping for a spatial architecture, including aggressively speculating control and memory dependences, and scheduling instructions using a large window. Evaluation of DynaSpAM shows a geomean speedup of 1.42x for 11 benchmarks from the Rodinia benchmark suite with a geomean 23.9% reduction in energy consumption compared to an 8-issue OOO pipeline. Heejin Ahn, Stephen R. Beard, Taewook Oh, David I. August |
ISCA | 3 |
| 2013 | Automatically exploiting cross-invocation parallelism using runtime informationabstractAutomatic parallelization is a promising approach to producing scalable multi-threaded programs for multicore architectures. Many existing automatic techniques only parallelize iterations within a loop invocation and synchronize threads at the end of each loop invocation. When parallel code contains many loop invocations, synchronization can easily become a performance bottleneck. Some automatic techniques address this problem by exploiting cross-invocation parallelism. These techniques use static analysis to partition iterations among threads to avoid crossthread dependences. However, this partitioning is not always achievable at compile-time, because program input determines dependence patterns at run-time. By contrast, this paper proposes DOMORE, the first automatic parallelization technique that uses runtime information to exploit additional cross-invocation parallelism. Instead of partitioning iterations statically, DOMORE dynamically detects crossthread dependences and synchronizes only when necessary. DOMORE consists of a compiler and a runtime library. At compile time, DOMORE automatically parallelizes loops and inserts a custom runtime engine into programs. At run-time, the engine observes dependences and synchronizes iterations only when necessary. For six programs, DOMORE achieves a geomean loop speedup of 2.1× over parallel execution without cross-invocation parallelization and of 3.2 × over sequential execution on eight cores. Jialu Huang, Thomas B. Jablin, Stephen R. Beard, Nick P. Johnson, David I. August |
CGO | 3 |
| 2011 | Automatic CPU-GPU communication management and optimizationabstractThe performance benefits of GPU parallelism can be enormous, but unlocking this performance potential is challenging. The applicability and performance of GPU parallelizations is limited by the complexities of CPU-GPU communication. To address these communications problems, this paper presents the first fully automatic system for managing and optimizing CPU-GPU communcation. This system, called the CPU-GPU Communication Manager (CGCM), consists of a run-time library and a set of compiler transformations that work together to manage and optimize CPU-GPU communication without depending on the strength of static compile-time analyses or on programmer-supplied annotations. CGCM eases manual GPU parallelizations and improves the applicability and performance of automatic GPU parallelizations. For 24 programs, CGCM-enabled automatic GPU parallelization yields a whole program geomean speedup of 5.36x over the best sequential CPU-only execution. Thomas B. Jablin, Prakash Prabhu, James A. Jablin, Nick P. Johnson, Stephen R. Beard, David I. August |
PLDI | 5 |