Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Hansheng Liu

dblp:414/6614 · DBLP profile ↗
← Back
1ranked-venue papers
0as first author
1since 2021 · last 2025
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware accelerators and domain-specific architectures · 77% Distributed systems · 12% Embedded and real-time systems · 12%
Network and information security
1 paper
Cyber-physical and IoT security · 100%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Cyber-physical and IoT security › in-vehicle network security › controller area network security
CAN bus intrusion detection
0.912025
MULSAM: Multidimensional Attention With Hardware Acceleration for Efficient Intrusion Detection on Vehicular CAN Bus · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Cyber-physical and IoT security
vehicular network security
0.912025
MULSAM: Multidimensional Attention With Hardware Acceleration for Efficient Intrusion Detection on Vehicular CAN Bus · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Hardware accelerators and domain-specific architectures › machine learning accelerator › inference accelerator
FPGA-based inference accelerator
0.912025
MULSAM: Multidimensional Attention With Hardware Acceleration for Efficient Intrusion Detection on Vehicular CAN Bus · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Hardware accelerators and domain-specific architectures
machine learning accelerator
0.912025
MULSAM: Multidimensional Attention With Hardware Acceleration for Efficient Intrusion Detection on Vehicular CAN Bus · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Distributed systems
edge computing
0.312025
MULSAM: Multidimensional Attention With Hardware Acceleration for Efficient Intrusion Detection on Vehicular CAN Bus · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Embedded and real-time systems › real-time AI systems
real-time inference
0.312025
MULSAM: Multidimensional Attention With Hardware Acceleration for Efficient Intrusion Detection on Vehicular CAN Bus · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025

Methods — techniques the papers use, named apart from their topics

self-attention mechanism · 1.7pipelining · 1.7multidimensional LSTM · 1.7fixed-point quantization · 1.7
YearPublicationVenuePosition
2025 MULSAM: Multidimensional Attention With Hardware Acceleration for Efficient Intrusion Detection on Vehicular CAN Bus
abstract
Controller area network (CAN) protocol is an efficient standard enabling communication among electronic control units (ECUs). However, the CAN bus is vulnerable to malicious attacks because of a lack of defense features. In this article, a novel vehicle intrusion detection system (IDS) is developed. The challenge is that existing techniques of IDSs rarely consider attacks with small-batch, which are characterized by their small attack scale and concealed attack patterns, posing a significant threat to driving safety. To solve this problem, we developed an algorithm model that merges multidimensional long short-term memory (MD-LSTM) and self-attention mechanism (SAM), shortly named MULSAM. The MULSAM model was compared with other baseline models, including stacked long short-term memory (LSTM), MD-LSTM, etc. Experiments show that our approach has the best-detection accuracy (98.98%) and training stability. Further, to speed up the inference of MULSAM on edge, the hardware accelerator is implemented on FPGA devices using technologies, such as parallelization, modular, pipeline, and fixed-point quantization. Experiments show that our FPGA-based acceleration scheme has a better-energy efficiency than the CPU platform. Even with a certain degree of quantification, the acceleration model for MULSAM still displays a high-detection accuracy of 98.81% and a low latency of 1.88 ms.
Xiaokang Shi, Hansheng Liu, Yanwen Wang 0001, Jiwu Lu, Haibo Zeng 0001, Renfa Li, Di Wu 0002
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.3