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Weijie Tong

dblp:415/5346 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2025
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 50% Hardware reliability and fault tolerance · 50%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › heterogeneous integration
chiplet integration
0.912025
ChipletEM: Physics-Based 2.5D and 3D Chiplet Heterogeneous Integration Electromigration Signoff Tool Using Coupled Stress and Thermal Simulation · DAC 2025
Hardware reliability and fault tolerance › aging
electromigration
0.912025
ChipletEM: Physics-Based 2.5D and 3D Chiplet Heterogeneous Integration Electromigration Signoff Tool Using Coupled Stress and Thermal Simulation · DAC 2025

Methods — techniques the papers use, named apart from their topics

finite-difference time-domain · 0.9finite volume method · 0.9coupled stress and thermal simulation · 0.9
YearPublicationVenuePosition
2025 ChipletEM: Physics-Based 2.5D and 3D Chiplet Heterogeneous Integration Electromigration Signoff Tool Using Coupled Stress and Thermal Simulation
abstract
A review of recent studies on up-to-date IC shows that electromigration (EM) has become one of the major challenges for 2.5D and 3D chiplet heterogeneous integration (CHI) systems. However, most existing researches on EM are focusing on 2D power delivery network without taking Through Silicon Via (TSV) and non-uniformly thermal distribution condition between dies into consideration. To address this problem, this article proposes a novel EM simulation tool ChipletEM for 2.5D and 3D CHI systems. A finite volume method (FVM) based electrical-thermal co-simulation model is employed to get initial temperature and current density inside TSV. And a finite difference time domain (FDTD) solver is used for hydrostatic stress simulation for both nucleation and postvoiding phases. Thermal migration (TM) effect is also considered in the solver. An analytical TSV thermal solver is employed for temperature distribution simulation and thermal dependent current simulation. The FDTD EM solver and TSV thermal solver are coupled together at each time step so that the interaction among EM stress, thermal stress, void growth, resistance change, IR drop and Joule heating effects can be simulated within a single simulation framework. Simulation results show that compared with Finite Element Method (FEM) tool, average error is 0.61% in nucleation phase and 2.4% in growth phase. And the error of proposed method is reduced from 22.22% to 5.24% compared with state of art atomic flux divergence (AFD) method.
Weijie Tong, Xiaoning Ma, He Cao, Jianyun Liu, Qinzhi Xu
DAC2