Real-time, energy-efficient inference on edge devices is essential for graph classification across a range of applications. Hyperdimensional Computing (HDC) is a brain-inspired computing paradigm that encodes input features into low-precision, high-dimensional vectors with simple element-wise operations, making it well-suited for resource-constrained edge platforms. Recent work enhances HDC accuracy for graph classification via Nyström kernel approximations. Edge acceleration of such methods faces several challenges: (i) redundancy among (landmark) samples selected via uniform sampling, (ii) storing the Nyström projection matrix under limited on-chip memory, (iii) expensive, contention-prone codebook lookups, and (iv) load imbalance due to irregular sparsity in SpMV.

On-device continual learning (CL) enables edge devices to adapt to non-stationary data streams without offline retraining, which is critical for real-time edge AI. However, most existing CL methods rely on backpropagation-based updates or exemplar-heavy classifiers, incurring high compute, memory, and latency overheads that hinder deployment on resource-constrained devices. Hyperdimensional Computing (HDC) offers an alternative by enabling fast, non-iterative online updates. When paired with a lightweight convolutional neural network (CNN) feature extractor, HDC supports efficient on-device adaptation with strong visual representations. Despite this progress, prior HDC-based continual learning systems typically employ multi-tier memory hierarchies and complex cluster management, which complicate deployment on resource-constrained hardware platforms.In this paper, we propose ImageHD, an FPGA accelerator for on-device continual learning of visual data based on HDC, designed to address these limitations. ImageHD targets streaming continual learning under strict latency and on-chip memory constraints, without expensive iterative optimization. At the algorithmic level, we introduce a hardware-optimized continual learning method that bounds total class exemplars through a unified exemplar memory and a hardware-efficient cluster merging strategy, while integrating a quantized CNN front-end to reduce edge deployment overhead without sacrificing accuracy. At the system level, ImageHD is realized as a streaming dataflow architecture on the AMD Zynq ZCU104 FPGA, integrating hyperdimensional encoding, similarity search, and bounded cluster management using word-packed binary hypervector representations to enable massively parallel bitwise operations within tight on-chip resource budgets. Experimental results on the CORe50 dataset demonstrate up to 40.4× (4.84×) speedups and 383× (105.1×) energy efficiency gains over optimized CPU (GPU) baselines, establishing HDC-enabled continual learning as a practical foundation for real-time, on-device lifelong learning systems.

Real-time, energy-efficient inference on edge devices is essential for graph classification across a range of applications. Hyperdimensional Computing (HDC) is a brain-inspired computing paradigm that encodes input features into low-precision, high-dimensional vectors with simple element-wise operations, making it well-suited for resource-constrained edge platforms. Recent work enhances HDC accuracy for graph classification via Nyström kernel approximations. Edge acceleration of such methods faces several challenges: (i) redundancy among (landmark) samples selected via uniform sampling, (ii) storing the Nyström projection matrix under limited on-chip memory, (iii) expensive, contention-prone codebook lookups, and (iv) load imbalance due to irregular sparsity in SpMV.