Demo Data from EDBT 2026 / reviewers in the wild / expert
Jinghan Zu
dblp:419/9250
· DBLP profile ↗
1ranked-venue papers
1as first author
1since 2021 · last 2025
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 1 · 1 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
1 paper |
Operating systems · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Storage systems · 62% Performance modeling and evaluation · 19% Cloud and datacenter computing · 19% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Operating systems › extensible operating systems › kernel extensibility
eBPF |
0.9 | 1 | 2025 | SkewTide: Bridging Efficiency and Tail Latency in Key-Value Stores via Kernel Re-Architecture · ICNP 2025 |
Operating systems › kernel
kernel design |
0.9 | 1 | 2025 | SkewTide: Bridging Efficiency and Tail Latency in Key-Value Stores via Kernel Re-Architecture · ICNP 2025 |
Storage systems
key-value storage |
0.9 | 1 | 2025 | SkewTide: Bridging Efficiency and Tail Latency in Key-Value Stores via Kernel Re-Architecture · ICNP 2025 |
Cloud and datacenter computing › quality of service
tail latency |
0.3 | 1 | 2025 | SkewTide: Bridging Efficiency and Tail Latency in Key-Value Stores via Kernel Re-Architecture · ICNP 2025 |
Performance modeling and evaluation
workload characterization |
0.3 | 1 | 2025 | SkewTide: Bridging Efficiency and Tail Latency in Key-Value Stores via Kernel Re-Architecture · ICNP 2025 |
Methods — techniques the papers use, named apart from their topics
eBPF · 1.7
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2025 | SkewTide: Bridging Efficiency and Tail Latency in Key-Value Stores via Kernel Re-ArchitectureabstractKey-value stores are the key building block of online services such as e-commerce. However, highly skewed workloads (i.e., skewed access frequency and request size) may cause severe load imbalance and head-of-line blocking, resulting in significant performance penalty (e.g., low throughput and high latency). Existing works mitigate skewed workloads, but often struggle to balance CPU efficiency with low tail latency or require specialized hardware. In this paper, we present SkewTide, an in-kernel architecture that breaks this trade-off through workload-aware request pre-processing and bypassing unnecessary network stack operations. Moreover, SkewTide carefully orchestrates size-aware parsing, sharding, caching, and queueing in the kernel. Both designs enable efficient CPU multiplexing and preserve low tail latency without specialized hardware. We implement SkewTide as an out-of-the-box framework using eBPF, making it readily deployable in existing key-value store infrastructure. Evaluation with YCSB traces shows that SkewTide achieves up to 8.1× higher throughput, 37% lower 99th-percentile latency, and 32% lower CPU usage compared to existing systems. Jinghan Zu, Zhengyan Zhou, Lingfei Cheng, Zhongfeng Jin, Haifeng Zhou, Chunming Wu 0001 |
ICNP | 1 |