This paper compares and contrasts the different traffic requirements of both voice and data communications. The role of evolving PBX technology in solving data communication needs is outlined, beginning with the analog PBX's of the 1970's and the digital-switching technology of the 1980's. The evolution of packet switching, and its superiority over traditional circuit switching for solving data communications needs, is analyzed. The paper concludes by describing a PBX implementation that takes advantage of circuit- and packet-switching technologies and thus offers a truly integrated multipurpose communications switch.

The speed at which large files can travel across a computer network is an important performance measure of that network. In this paper we examine the achievable sustained throughput in the ARPANET. Our point of departure is to describe the procedures used for controlling the flow of long messages (multipacket messages) and to identify the limitations that these procedures place on the throughput. We then present the quantitative results of experiments which measured the maximum throughput as a function of topological distance in the ARPANET. We observed a throughput of approximately 38 kbit/s at short distances. This throughput falls off at longer distances in a fashion which depends upon which particular version of the flow control procedure is in use; for example, at a distance of 9 hops, an October 1974 measurement gave 30 kbit/s, whereas a May 1975 experiment gave 27 kbit/s. The two different flow control procedures for these experiments are described, and the sources of throughput degradation at longer distances are identified, a major cause being due to a poor movement of critical limiting resources around in the network (this we call "phasing"). We conclude that flow control is a tricky business, but in spite of this, the ARPANET throughput is respectably high.

A model for program behavior, the renewal model, is introduced; its properties are discussed, and its ability to model the behavior of real programs is investigated. Using this renewal model, several theorems are derived which describe the performance of the working set replacement algorithm. Then the renewal model is used to evaluate the performance of a replacement algorithm for two-level directly addressable memory hierarchies.

In this paper we consider the application of the stack algorithm concept to a two-level paged storage hierarchy in which both levels are directly addressable by the central processor. Since both levels are directly addressable, pages need not reside in the first level of memory for a reference to be completed. The effectiveness of a page replacement algorithm in such a storage hierarchy is measured by the frequency of references to the first level of memory and the number of page promotions. It is shown that the stack algorithm concept can easily be extended to apply to two-level directly addressable memory hierarchies. A class of page replacement algorithms called stack replacement algorithms is defined. An efficient procedure exists for collecting data on the performance of stack replacement algorithms.