Error correcting codes have been successfully employed to correct errors associated with failures in computer memories. A typical code which has found wide application is the binary Hamming code. This code corrects single bit errors. With the advent of large-scale integration (LSI) storage array technology, the likelihood of errors which exceed the correction and detection capability of such a code is significant. A serious and heretofore unanswered question is the error detection capability of a given code which is implemented and decoded for single error correction, particularly when a storage array chip or card carrying multiple bits from the codeword has failed. In order to identify this capability, a new reliability parameter called package detectability is defined. This paper also presents a method for computing package detectability. The analysis has been performed on a number of codes in order to optimize the packaging for maximum detectability. In addition, a class of distance 3 codes with maximal b-bit package detectability is given.

When errors occur which exceed the correction capability of an error correcting code, the only recourse to restore the original memory function is to physically replace the failed entity. In this paper the authors propose an automatic reconfiguration technique which uses the concept of address skewing to disperse such multiple errors into correctable errors. No additional redundancy other than that required for the error correcting code is needed. The skewing mechanism is derived using the theory of orthogonal Latin squares.

Self-reciprocal polynomials (SRP's) are used to generate reversible codes with a read backward property. We characterize all the irreducible SRP's of a given degreer. Furthermore, a method of obtaining a maximal exponent SRP is presented. A short table lists the maximal exponents of SRP's of degree up tor = 34.

The comment is valid in that the authors followed the given algorithm G in footnote 1 to the letter to come to their conclusion. However, the spirit of the algorithm was somewhat misrepresented in the original paper. A clearer version for the algorithm G follows. The two additional tests claimed by the commentors do not arise if the following version is carried to the letter. And therefore our original assertion about the near minimality still seems valid. Similarly, the additional tests claimed by the commentors using procedure NR will be eliminated if the following version of algorithm G is used in procedure NR. This answers the commentors conclusion 2) in [1].

The important problem of generating test patterns to detect multiple faults has received little attention, mainly due to their computational complexity. The theoretical results of this paper show that near minimal tests for multiple faults can be generated with complexity of computation comparable to that of single faults.