This article presents a method for integrating traveling wave models (TWMs) into an optical circuit simulator based on modified nodal analysis (MNA) techniques previously developed for electrical circuit simulation. TWMs of optical propagation through waveguides provide flexible distributed descriptions of optical devices from simple waveguides to lasers. The model is, however, by definition an explicit time marching method and does not fit naturally into an MNA formulation. This article will show a method of integrating the TWM into a fully implicit multidomain (electrical/optical) circuit simulator based on MNA techniques. It will first describe the TWM for simple optical propagation and then its extension for optical gratings, amplifiers, and lasers. The integration of the TWM model into the MNA-based engine will then be specified, showing how the model is implemented using nonlinear optical sources. Finally, a set of examples, including waveguides, filters, and electro-optic devices will be used to show the effectiveness of the technique.

This paper presents a procedure for the creation of versatile and powerful thermal compact models of integrated optical devices and demonstrates their use in an optical circuit level simulator. A detailed 3-D model of the device is first built using a meshless finite cloud method, producing a large linear sparse set of equations. This model is then reduced to a compact representation using a Krylov subspace model reduction (MR) technique. Such a reduced model is described by small dense matrices, but can reproduce the original temperature distribution within acceptable error. Three devices are used as demonstration models for the technique: a microdisc laser and two microring-based devices, a modulator, and an optical switch. All three devices are built in a silicon on oxide platform. Using MR the linear systems describing these models are reduced from thousands of unknowns to systems with less than 100 reduced variables. It is then demonstrated how the reduced compact models can be linked together to describe a complete optical system with solution errors of lower than 1%. Finally, it is shown how this reduced thermal model can be utilized in a circuit level opto-electronic circuit simulator and simulations are presented, demonstrating the effectiveness of the reduced models in speeding up simulation times or enabling otherwise intractable problems.

The increased use of optics in information processing and transmission systems motivates the development of self-consistent opto-electronic transient simulators. This letter presents a technique to significantly improve the DC and transient convergence behavior of a modified nodal analysis based optoelectronic simulation framework by allowing optical device models to be “switched” between a linear formulation using real and imaginary fields to a non-linear magnitude and phase representation. Configurable multilayer filters and optical ring modulators are used as examples to demonstrate the effectiveness of this approach in obtaining robust simulation convergence.

A compact, efficient electrical dual-circuit topology for the representation of transient thermal coupling is presented. Based on controlled sources, the method allows an arbitrary level of complexity to be used for each self and coupled response. Two possible variations on the circuit form, and the resulting requirements for model extraction, are developed. The method is applied to the modeling of transient thermal self-heating and coupling data for a pair of thermal sources representative of integrated device structures in semi-infinite homogeneous as well as trench-isolated substrates.

The prediction of a simple lumped representation of heat sharing through emitter interconnect in high-power multiemitter bipolar devices is compared to numerical thermal simulation and found to exhibit nonphysical results. Using numerical simulation, interfinger metal heat flow is characterized qualitatively in three dimensions and the requirements for a more accurate model are determined. A new modeling approach based on these insights, using segmented emitters and a coarse representation of the metal structure, yields results within 2% of those obtained from numerical thermal simulation for a wide variety of device geometries and substrate materials, with a simulation time reduction of more than an order of magnitude. Using the new model, an extensive series of simulations is performed for devices fabricated in Si, GaAs, and InP substrates using Al and Au for metallization. Reduction in maximum temperature due to the presence of emitter interconnect in these structures is found to be in the range of 5%-15%.

This paper presents a novel three-dimensional (3D) thermal simulation tool for semiconductor integrated devices. The simulator is used to automatically generate an accurate 3D physical model of the device to be simulated from layout information. The simulator produces an appropriate mesh of the device based on a rectangular block structure. The mesh is automatically created such that a fine mesh is produced around heat generation regions, but a moderate number of blocks are used for the entire device. This paper first confirms that the simulator produces an accurate solution to the nonlinear differential equation describing the heat flow. Then model generation from three example technologies (silicon trench, GaAs mesa structures, silicon on insulator) is presented. The potential of the simulator to quickly and easily explore the effect of layout and process variations is illustrated, with the simulation of a two-transistor GaAs power cell as a large example. The program incorporates a transient solver based on a transmission line matrix (TLM) implementation using a physical extraction of a resistance and capacitance network. The formulation allows for temperature dependent material parameters and a nonuniform time stepping. An example of a full transient solution of heat flow in a realistic Si trench device is presented.

A quasi-three-dimensional ballistic deposition model for thin film growth by physical vapor deposition is described. This model incorporates three-dimensional incident flux distributions and shadowing effects, but simulates deposition through disc accretion in a two-dimensional plane. Results from the simulation of sputtered metal deposition over vias ranging from 0.5 to 3.0 mu m width are presented and compared with two-dimensional simulation results. Step coverages are calculated and plotted as a function of via size. The use of a ballistic deposition program enables a density analysis of the simulated films. The simulated films display a drop in density of 22-27% for the films deposited on the via sidewalls, and this density drop is plotted versus via size for both the two-dimensional and three-dimensional simulations.>