In this paper, we address the floating-point division operation under the Half Unit Biased (HUB) format. The proposed division algorithm is based on digit recurrence methods, which have been recently employed in modern processors. We extend previous work on digit recurrence HUB division by introducing techniques that enhance the division. Specifically, we demonstrate that prescaling the divisor and dividend, which makes the quotient-digit selection function independent of the divisor, is also valid for the HUB approach. Additionally, techniques such as prediction and high-radix are considered. We adapt an efficient high-radix division architecture recently proposed to the HUB approach, showing that the HUB format allows us to reduce the hardware in previous high-radix designs, as rounding to the nearest is performed by truncation, thereby eliminating the need for a final rounding operation. Experimental results corroborate the expected predictions. Although the HUB format is not IEEE-754 compliant, it maintains the same precision as its IEEE-754 counterpart for floating-point division in round-to-nearest mode.