EDBT 2026 Demo / reviewers in the wild / expert
Wes Campbell
dblp:429/2244
· DBLP profile ↗
1ranked-venue papers
0as first author
1since 2021 · last 2026
0000-0003-1578-906XORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Emerging computing paradigms · 100% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Emerging computing paradigms
quantum computer architecture |
1.0 | 1 | 2026 | iSwitch: QEC on Demand via In-Situ Encoding of Bare Qubits for Ion Trap Architectures · ASPLOS (2) 2026 |
Emerging computing paradigms › quantum computer architecture
quantum error correction |
1.0 | 1 | 2026 | iSwitch: QEC on Demand via In-Situ Encoding of Bare Qubits for Ion Trap Architectures · ASPLOS (2) 2026 |
Emerging computing paradigms › quantum computer architecture
trapped ion quantum computer |
1.0 | 1 | 2026 | iSwitch: QEC on Demand via In-Situ Encoding of Bare Qubits for Ion Trap Architectures · ASPLOS (2) 2026 |
Compilers and program optimization › compiler optimization
quantum compiler optimization |
0.3 | 1 | 2026 | iSwitch: QEC on Demand via In-Situ Encoding of Bare Qubits for Ion Trap Architectures · ASPLOS (2) 2026 |
Methods — techniques the papers use, named apart from their topics
scheduling optimization · 2.0in-situ encoding · 2.0hybrid instruction set · 2.0conversion protocol · 2.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | iSwitch: QEC on Demand via In-Situ Encoding of Bare Qubits for Ion Trap ArchitecturesabstractRecent advances in quantum hardware and error correction have paved the way for early fault-tolerant (EFT) quantum computing. We propose iSwitch, a hybrid system architecture for trapped-ion quantum computers (TIQC) that exploits ultra-high-fidelity single-qubit gates and efficient logical CNOTs enabled by ion shuttling. iSwitch employs bare qubits for single-qubit operations and QEC-encoded logical qubits for two-qubit gates, avoiding full logical encoding, gate synthesis, and magic state distillation. To enable this selective encoding, we develop a low-noise conversion protocol between bare and logical qubits, a hybrid instruction set tailored to 2D TIQC layouts, and a compiler that minimizes conversion overhead and optimizes scheduling. Evaluations on variational quantum algorithm benchmarks show that iSwitch achieves comparable fidelity to conventional QEC methods, while reducing qubit and operation counts by roughly 33–50%, offering a practical, resource-efficient path toward EFT quantum computing on trapped-ion platforms. Keyi Yin, Eneet Kaur, Reza Nejabati, Hartmut Haeffner, Wes Campbell, Eric R. Hudson, Jens Palsberg, Travis S. Humble, Yufei Ding 0001 |
ASPLOS (2) | 8 |