We propose a multiple valued logic (MVL) network with functional completeness and develop its learning capability. The MVL network consists of layered arithmetic piecewise linear processors. Since the arithmetic operations of the network are basically a wired sum and a piecewise linear operation, their implementations should be rather simple and straightforward. Furthermore, the MVL network can be trained by the traditional backpropagation algorithm directly. The algorithm trains the networks using examples and appears to be available for most MVL problems of interest.

A self-calibrating analog-to-digital (A/D) converter employing a T-model neural network is described. Errors of the converter due to offset and device mismatch are corrected by a simple error back propagation algorithm in the T-model neural network. An experimental A/D converter using standard 5-/spl mu/m CMOS IC circuits demonstrates high-performance analog-to-digital conversion and self-calibration.

In this paper, we consider multivalued multithreshold networks (MVTN's) to realize multivalued logic functions. Transformations of multivalued functions into multivalued multithreshold functions, and network syntheses for MVTN's are described. There are three emphases on the MVTN's:1) any arbitrary multivalued function can be realized by an MVTN, 2) an MVTN can be composed of conventional threshold elements, and 3) various synthesis procedures for binary multithreshold networks can be applied to MVTN's.