Sharing of spectrum and radio access networks (RANs) has been a trend for future mobile networks to economically cope with fast growth in wireless data traffic and services. Although technical and regulatory advancements in dynamic spectrum sharing and wireless network virtualization (WNV) have brought new possibility of sharing, it is unclear how individual mobile network operators (MNOs) may benefit from sharing while in competition. In this regard, we propose a novel framework of independent service sharing coordination (ISSC). The framework sets up an independent platform that respectively collects information from all MNOs for coordination and ensures individual confidentiality at the same time. Each MNO plays both seller and buyer of shared resources and has chicken-egg problems between buy and sell decisions. The framework then adopts a Nash game theoretic approach, where the ISSC platform finds individual MNOs' strategies by iterating over demand estimation, resource allocation, price determination, and subscriber number estimation to find the best response for each MNO. Numerical study demonstrates that ISSC may facilitate all-win sharing of spectrum and RANs among competing MNOs, especially when MNOs have a medium level of demands with different spectrum availability and small cell coverages.

A time-varying channel estimation method for orthogonal frequency division multiplexing (OFDM) systems is presented. The proposed method makes use of two asymmetric pilot symbols to improve channel estimation performance and meanwhile obtain a reasonable pilot overhead. Complete simulations illustrate that the proposed method can have precise estimation result even under very large normalized Doppler frequency.

A time-varying channel estimation method for orthogonal frequency division multiplexing (OFDM) systems is presented. The presented channel estimation method employs two training symbols in combination with polynomial fitting, thus obtaining accurate estimation results under a large normalized Doppler frequency.

The paper illustrates that multiple access interference (MAI) can be reduced by arranging the spreading codes in multi-carrier code division multiple access (MC-CDMA) systems. An effective spreading code allocation procedure using simple least square (LS) channel estimation is presented to reduce the MAI in downlink MC-CDMA systems. Moreover, the spreading codes chosen by the method are in a consistent sequence. Using this code selection method, the system capacity of MC-CDMA can be effectively increased without increasing too much system complexity. Simulation results show that the presented method can work well for both time-invariant and fading channels.

Carrier frequency offset (CFO) may cause multiple access interference (MAI) among users in multi-carrier code division multiple access (MC-CDMA) system. In the paper the code sensitivity of spreading codes and its correlative to the CFO is observed. An important property of orthogonality invariant for Walsh Hadamard spreading codes under CFO is presented. By partitioning spreading codes into several mutually orthogonal groups, if the spreading codes are chosen from different groups, free MAI can be maintained for any values of CFO. The characteristic can help us to develop code selection algorithm for choosing appropriate spreading codes that has less MAI under frequency offset transmission.

The Vertical Bell Laboratories Layered Space Time (V-BLAST) detection presented for multiple-input multiple- output (MIMO) system can also be used for orthogonal frequency division multiplexing (OFDM) signal detection, and is referred as the successive interference cancellation (SIC) method. In the paper a refined SIC algorithm is first presented. Then, several less complexity modified SIC algorithms for OFDM signal detection in multi-path fading channel are presented. The presented modified SIC algorithms can significantly reduce the computation complexity of SIC and meanwhile maintain excellent performance.

The paper illustrates that multiple access interference (MAI) can be reduced by re-ordering the spreading codes in multi-carrier code division multiple access (MC-CDMA) systems. An effective spreading code allocation procedure using simple least square (LS) channel estimation is presented to reduce the MAI in downlink MC-CDMA systems. Moreover, the spreading codes chosen by the method are in a consistent sequence. Using this code selection method, the system capacity of MC-CDMA can be effectively increased without increasing the system complexity. Simulation results show that the presented method can work well for both time-invariant and fading channels.

A time-varying channel estimation method for orthogonal frequency division multiplexing (OFDM) systems is presented. The presented method makes use of two training symbol scheme in combination with high-order polynomial fitting, and can thus obtain precious estimation results even under very large normalized Doppler frequency. Simulation results show that the presented method with second order of polynomial can work well at a normalized Doppler frequency as large as 0.08.

In this paper it first illustrate that the real bit error rate (BER) of adaptive modulation in fading channels may away from the design BER due to the sensitivity of switching levels. A moving average method is presented to resolve this issue in the slow fading channels. For fast fading channels, a method by offsetting the switching levels is presented. Simulation results show that constant BER as well as high throughout can be achieved if the presented methods are applied to the adaptive quadrature amplitude modulation with orthogonal frequency division multiplexing (AQAM-OFDM) system in multi-path fading channels.

A systolic power-sum circuit designed to perform AB/sup 2/+C computation in the finite field GF(2/sup m/) has been presented recently. Based on the power-sum circuit, a VLSI architecture for performing exponentiations in GF(2/sup m/) is developed. Furthermore, two modified architectures that can be used to compute multiplicative inverses and divisions in GF(2/sup m/) are proposed respectively. All the architectures are constructed by m-1 power-sum circuits. The average computation time of the architectures is only two logic gate delays and the circuit complexity is realizable in present VLSI technology. It should be emphasized at this point that the computation time of two gate delays is the highest computation speed in finite field arithmetic.>

A systolic power-sum circuit designed to perform AB/sup 2/+C computations in the finite field GF(2/sup m/) is presented, where A, B, and C are arbitrary elements of GF(2/sup m/). This new circuit is constructed by m/sup 2/ identical cells, each of which consists of three 2-input AND logical gates, one 2-input XOR gate, one 3-input XOR gate, and ten latches. The AB/sup 2/+C computation is required in decoding many error-correcting codes. The paper shows that a decoder implemented using the new power-sum circuit will have less complex circuitry and shorter decoding delay than one implemented using conventional product-sum multipliers.>

A high speed decoding algorithm using a modified step-by-step method for t-error-correcting Reed-Solomon codes is introduced. Based on this algorithm, a sequential decoder and a vector decoder are then proposed. These two decoders can be constructed by four basic modules: the syndrome calculation module, the comparison module, the decision module, and the shift-control module. These decoders can be applied for both binary and nonbinary data transmissions working at high data rate. Because of the simplicity in structure and circuit realization, a decoder employing this algorithm can be easily implemented in a monolithic chip by the VLSI technology.>

A high-speed real-time decoder for t-error-correcting binary BCH codes based on a modified step-by-step decoding algorithm is presented. The average operation cycle, for decoding each received word is just equal to the block length of the codeword. The decoder is constructed of three modules: the syndrome module, the comparison module, and the error corrector. Since all of the modules can be implemented by systolic circuits, the data rate of this decoder can theoretically be up to the rate of the inverse of two logic-gate delays operating from approximately several hundreds of megabits per second to the order of gigabits per second. Thus, the decoder can be applied in broadband service and video processing. By avoiding inverse operations in the step-by-step decoding method, the circuit complexity of the decoder can be made much less than that of the standard algebraic method. The detailed circuit diagrams of the comparison module and error corrector for double- and triple-error-correcting binary BCH codes are given for illustration.>

About 2800 lines out of a total of 8,500,000 subscriber lines in Taiwan have been sampled and characterized. Various kinds of physical compositions and transmission characteristics were investigated and measured. It was found that the near-end crosstalk (NEXT) loss of Taiwan's subscriber loops is about 10 dB worse than that of US local loops. A corresponding new foam-skin PIC cable is proposed to reduce the NEXT loss. The new type of cable will be used to replace the paper cable and old foam-skin PIC cable step-by-step. Based on the measured data, the feasibility of HDSL (high bit rate digital subscriber line) service in Taiwan is studied. To improve the HDSL service distance via the existing subscriber lines, several cable models are discussed and suggested.>

An algebraic decoding method for triple-error-correcting binary BCH codes applicable to complete decoding of the (23,12,7) Golay code has been proved by M. Elia (see ibid., vol.IT-33, p.150-1, 1987). A modified step-by-step complete decoding algorithm of this Golay code is introduced which needs fewer shift operations than Kasami's error-trapping decoder. Based on the algorithm, a high-speed hardware decoder of this code is proposed.>