Human designers have done amazing things with FPGAs. These designs challenge our assumptions about the speeds and densities acheivable by programmable hardware. But with multi-million gate designs and increasingly complex FPGA architectures is there really any place for the hand-crafted design anymore? Is there a way that CAD tools can incorporate the techniques and knowledge of designers to create high-density, high-performance implementations automatically? Or will the tools and architectures always lag the applications, thereby guaranteeing abundant job opportunities for FPGA design experts?

The current trend back toward hardware intensive signal processing has uncovered a relative lack of understanding of hardware signal processing architectures. Many hardware efficient algorithms exist, but these are generally not well known due to the dominance of software systems over the past quarter century. Among these algorithms is a set of shift-add algorithms collectively known as CORDIC for computing a wide range of functions including certain trigonometric, hyperbolic, linear and logarithmic functions. While there are numerous articles covering various aspects of CORDIC algorithms, very few survey more than one or two, and even fewer concentrate on implementation in FPGAs. This paper attempts to survey commonly used functions that may be accomplished using a CORDIC architecture, explain how the algorithms work, and explore implementation specific to FPGAs. 1.1 Keywords CORDIC, sine, cosine, vector magnitude, polar conversion