Active research and development efforts on byte addressable non-volatile (NV) memory technologies, such as STT-RAM, PCM, and ReRAM, have been conducted in recent years. Because they are byte addressable, they can be used as main memory by directly connecting them to CPUs. Because they are non-volatile, they can also be used as storage device. While there were the active researches on their use for either main memory or secondary storage, these researches were conducted independently. This paper presents the memory management methods that enable the integration of main memory and file systems, thus, both main memory and storage are realized on the same byte addressable NV memory. The presented methods construct a file system on NV memory, and memory blocks assigned to files are exported for the use of main memory. We implemented the proposed methods in the Linux kernel, and performed their evaluation. The evaluation results show that the file-based methods can perform comparably to the existing DRAM memory allocator and can maintain the consistency of a file system.

We have been developing Hybrid OpenCL, which enables the utilization of OpenCL devices by connecting them over the network. Hybrid OpenCL opens a gate to scale up OpenCL environments. By using Hybrid OpenCL, applications written in OpenCL can be easily ported to high performance cluster computers, thus, Hybrid OpenCL can provide more various distributed and parallel computing platforms. Hybrid OpenCL consists of two elements, a runtime system that provides the abstraction of OpenCL implementations and a bridge program that connects multiple OpenCL runtime systems over the network. This paper describes the design and implementation Hybrid OpenCL. Its performance for distributed processing is evaluated by using multiple nodes. The experimentation results show that the overhead introduced by Hybrid OpenCL is minimum and comparable with the combination of MPI and OpenCL.

This paper proposes a speech and audio coder which operates at 1 bit/sample, namely an 8 kbit/s coder for 8 kHz sampling or a 16 kbit/s coder for 16 kHz sampling. The basic structure is inherited from a Twin VQ (transform domain weighted interleave vector quantization) high-quality audio coding scheme. A periodical component extraction scheme is newly added to the quantization of the MDCT coefficients. This scheme is found to be effective for reducing distortion and improving the robustness against channel errors. The qualities for music signals at 8 kbit/s are better than those of G.729 at the same bit rates, while they are worse for clean speech. The qualities at 16 kbit/s are comparable to or better than those of G.722 at 48 kbit/s.

This paper proposes two novel techniques for twinVQ (transform domain weighted interleave VQ) high-quality audio coding scheme for rates lower than 64 kbit/s. One is an extension of the weighted interleave technique to the time and input channel domains as well as the frequency domain. The other is an efficient representation scheme of the spectral envelope by means of a interpolated square root LPC (linear predictive coding) spectrum.

A new audio-coding method is proposed. This method is called transform-domain weighted interleave vector quantization (TwinVQ) and achieves high-quality reproduction at less than 64 kbit/s. The method is a transform coding using modified discrete cosine transform (MDCT). There are three novel techniques in this method: flattening of the MDCT coefficients by the spectrum of linear predictive coding (LPC) coefficients; interframe backward prediction for flattening the MDCT coefficients; and weighted interleave vector quantization. Subjective evaluation tests showed that the quality of the reproduction of TwinVQ exceeded that of an MPEG Layer II coder at the same bitrate.

This paper describes the design of a speech coder called pitch synchronous innovation CELP (PSI-CELP) for low hit-rate mobile communications. PSI-CELP is based on CELP, but has more adaptive excitation structures. In voiced frames, instead of conventional random excitation vectors, PSI-CELP converts even the random excitation vectors to have pitch periodicity by repeating stored random vectors as well as by using an adaptive codebook, in silent, unvoiced, and transient frames, the coder stops using the adaptive codebook and switches to fixed random codebooks. The PSI-CELP coder also implements novel structures and techniques: an FIR-type perceptual weighting filter using unquantized LPC parameters, a random codebook with a conjugate structure trained to be robust against channel errors, codebook search with delayed decision, a gain quantization with sloped amplitude, and a moving average prediction coding of LSP parameters, Our speech coder is implemented by DSP chips. Its coded speech quality at 3.6 kb/s with 2.0 kb/s redundancy is comparable to that of the Japanese full-rate VSELP coder at 6.7 kb/s with 4.5 kb/s redundancy. The basic structure of this PSI-CELP coder has been chosen as the Japanese half-rate speech codec for digital cellular telecommunications.>

This paper proposes high-quality and low bit-rate (3.6 and 2.4 kbit/s) coders using a pitch synchronous innovation CELP (PSI-CELP) method or a phase adaptive PSI-CELP. PSI-CELP, which is used as the excitation structure of the half-rate codec for the standard of Japanese digital mobile telephony, is based on CELP but adds pitch synchronous innovation, which means that even random codevectors are adaptively converted to have pitch periodicity for voiced frames. Phase adaptive PSI-CELP makes not only the periodicity, like in PSI-CELP, but also the phase of random codevectors equal to those of an adaptive codevector. The subjective qualities of the 3.6- and 2.4-kbit/s coders exceed those of the 6.7-kbit/S VSELP coder, which is the full-rate codec for the standard of Japanese digital mobile telephony, and-the 4.8-kbit/s U.S. Federal Standard 1016 CELP coder, respectively, in the error-free condition.>

Describes the architecture of a newly designed LSI for speaker-independent speech recognition. The recognition algorithm used in this LSI is based on a vector quantization technique and a dynamic time-warping technique using multiple word templates. In order to efficiently execute the complicated recognition algorithm, this LSI has the following architectural features: (1) address-generator independent of the data-calculating circuit, (2) pipelined architecture (3) structure of separate data buses, (4) multiplexed data bus with timing distribution, (5) horizontal-type micro-program. This LSI can recognize up to 32 speaker-independent isolated words (or up to 512 speaker dependent isolated words) within 0.4 seconds after speech endpoint detection. An average of recognition rate for Japanese 10-digit words is 97%. By using this LSI, a speech recognition system can be easily constructed on single board.>