High-speed communication over mutually coupled channels can be severely affected by intersymbol interference (ISI) and crosstalk (XT). Multiple-input multiple-output (MIMO) equalization is known to mitigate both ISI and XT, but requires accurate channel information at the receiver (RX) and/or transmitter (TX), when the channel is stochastic. However, since adjusting the equalization filters to the specific channel realization involves a considerable implementational and computational complexity, it is desirable to keep the equalization filters fixed irrespective of the specific channel realization, especially when the channel variability is relatively small. Therefore, we propose a general MIMO transceiver scheme where the equalization filters depend on the channel statistics rather than the actual channel. More specifically, by considering the time-domain equalization with the fixed linear MIMO pre-equalization and adjustable MIMO decision feedback equalization, the complexity associated with passing channel information from the RX to the TX is avoided, and the computationally intensive and iterative calculations of the fixed pre-equalizer can be performed offline rather than on-chip. The proposed equalization scheme is shown to yield only a small performance degradation compared to fully adjustable equalization schemes, thereby enabling multi-Gbit/s chip-to-chip communication over low-cost electrical interconnects which are prone to manufacturing tolerances.

While the requirements for delivering high throughputs increase exponentially with every generation of access node hardware, the device cost is of primary concern. As a result, multiple- input multiple-output (MIMO) equalization, which has been shown to facilitate multi-Gbit/s communication over low-cost parallel electrical interconnects, is emerging as an attractive high- speed interconnect solution for next-generation access nodes. Because of the high operating frequencies, however, the transfer functions of the on- and off-chip interconnects become highly susceptible to manufacturing tolerances (MTs); hence, the equalization filters must be adjusted to the specific channel realization to achieve optimal performance, which involves a high implementation and computational complexity. Considering that the MTs are usually limited, we propose a robust low-complexity transceiver consisting of a fixed MIMO linear pre-equalizer (which avoids the need for feeding back the channel state information to the transmitter), with either a fixed or adjustable MIMO decision- feedback equalizer (DFE). For a specific chip-to- chip interconnect operating at 75 Gbit/s per line and a 26 dB signal-to-noise ratio, we show that the resulting bit error rate does not exceed 10^(-12) for MTs up to 10.5% (fixed DFE) and 17.7% (adjustable DFE) of the nominal line width.