Demo Data from EDBT 2026 / reviewers in the wild / expert
Silpa Rose Mary
dblp:436/2353
· DBLP profile ↗
1ranked-venue papers
1as first author
1since 2021 · last 2026
0009-0008-1419-5781ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Storage systems · 62% Processor architecture and microarchitecture · 19% Memory systems · 19% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Storage systems
data compression |
1.0 | 1 | 2026 | Efficient Memory/Bandwidth Utilization Data Compression Techniques in Wireless Data Processing SoC Systems · IEEE Trans. Computers 2026 |
Processor architecture and microarchitecture
chip multiprocessor |
0.3 | 1 | 2026 | Efficient Memory/Bandwidth Utilization Data Compression Techniques in Wireless Data Processing SoC Systems · IEEE Trans. Computers 2026 |
Memory systems
memory bandwidth |
0.3 | 1 | 2026 | Efficient Memory/Bandwidth Utilization Data Compression Techniques in Wireless Data Processing SoC Systems · IEEE Trans. Computers 2026 |
Methods — techniques the papers use, named apart from their topics
block scaling compression · 1.0block floating point compression · 1.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Efficient Memory/Bandwidth Utilization Data Compression Techniques in Wireless Data Processing SoC SystemsabstractTo address growing wireless data processing demands in telecommunications and radar sensors, heterogeneous multiprocessor systems-on-chip (MPSoC) integrating programmable processors and hardware accelerators are increasingly being utilized. As the number of multiple-input multipleoutput (MIMO) elements to process data increases in telecommunications and radar system on chips (SoCs), computational complexity and area of these SoCs also grows. Use of MIMO technology also increases the volume of data transfer across the interconnects and also data storage requirements in on-chip memories of the MPSoCs. Data compression is an important way to reduce memory sizes, data transfer time, and communication bandwidth requirements in wireless data processing SoCs. In this article, we focus on efficient memory and bandwidth utilization data compression techniques for wireless data processing SoCs with applications in telecommunications and automotive radars. To this end, our contribution is twofold: First, we present a comprehensive literature review of both lossy and lossless compression techniques playing a critical role in reducing band-width utilization across SoC interconnects and minimizing onchip memory usage. We provide a classification of the use of compression techniques utilized for data compression, and also propose a comprehensive taxonomy of compression techniques for wireless data processing SoCs. We make the case that, although automotive radar SoCs currently utilize data compression techniques to save on-chip memory sizes, compression during in-phase and quadrature (IQ) data transfers from the front-end to the baseband is now essential for MIMO radars. This is due to the large number of receive processing chains being incorporated in these radars to improve their resolution to meet the stringent requirements of autonomous driving. Our second contribution is to design data compression for automotive radar IQ data. Using real radar data collected by us, via the Texas Instruments (TI) AWR1642 radar SoC, we present radar IQ data analysis. We also present two radar data compression techniques for radar data transfer and show that block floating point (BFP) compression performs better than block scaling compression (BSC). Our results show that the automotive radar IQ data can be compressed 50% without degrading the radar detection performance. Silpa Rose Mary, Zaheer Khan 0001 |
IEEE Trans. Computers | 1 |