Demo Data from EDBT 2026 / reviewers in the wild / expert
E. Kronstadt
dblp:44/10971
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1982
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 91% Hardware accelerators and domain-specific architectures · 9% |
Topics — the 3 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware verification and test › logic simulation
gate-level simulation |
0.0 | 1 | 1982 | Software support for the Yorktown Simulation Engine · DAC 1982 |
Electronic design automation
hardware verification and test |
0.0 | 1 | 1982 | Software support for the Yorktown Simulation Engine · DAC 1982 |
Electronic design automation › hardware verification and test
logic simulation |
0.0 | 1 | 1982 | Software support for the Yorktown Simulation Engine · DAC 1982 |
Methods — techniques the papers use, named apart from their topics
parallel simulation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1982 | Software support for the Yorktown Simulation EngineabstractThe Yorktown Simulation Engine (YSE) is a special-purpose, highly-parallel programmable machine for the gate-level simulation of logic. The YSE has been designed and is being constructed at the IBM T. J. Watson Research Center. It can simulate up to one million gates at a speed of over two billion gate simulations per second; it is estimated that the IBM 3081 processor could have been simulated on the YSE at a rate of 1000 instructions per second. This is far beyond the capabilities of existing register-level software simulators. This paper describes the software support for the YSE. E. Kronstadt, Gregory F. Pfister |
DAC | 1 |