The floorplan area optimization problem is to determine the dimensions of each module when the topology of the floorplan is given. The objective is to minimize the area of the resulting floorplan. An algorithm for general hierarchical floorplans is presented. The shape curves for non-slicing configurations are constructed by operations on the graph representations of the floorplan. The points of a shape curve are determined by simultaneously reducing the length of all longest paths of the vertical adjacency graph, using a minimum cut technique. The algorithm is applicable to hierarchical floorplans of high order and to modules with an infinite set of possible dimensions.>

The approach is to eliminate vias systematically by modifying the routing layout. The algorithm was implemented and applied to benchmark routing layouts published in the literature. Significant reduction in the number of vias was obtained without increasing the routing area. The experimental results show that the algorithm is more effective in via reduction and more efficient in running time than conventional via minimization algorithms. In particular, for Burstein's 19-track two-layer routing solution to Deutsch's difficult problem, the algorithm obtains a 34% reduction in the number of vias, which is more than an 11% improvement over the conventional constrained via minimization (CVM) approach. The application of the algorithm to various solutions to Deutsch's difficult problem produces the fewest of vias ever reported in the literature.>

We present in this paper a new approach to the two-layer via minimization problem. Our approach is to systematically eliminate vias by modifying the routing layout. We have implemented our algorithm and applied it to benchmark routing layouts published in the literature, and obtained significant reduction in the number of vias without increasing the routing area. The experimental results show that our algorithm is more effective in via reduction and more efficient in running time compared to conventional via minimization algorithms. In particular, for Burstein's 19 track solution to Deutsch's difficult problem, our algorithm obtains 34% reduction in the number of vias, which is more than 11% improvement over the conventional CVM (constrained via minimization) approach. The application of our algorithm to various solutions to the Deutsch's difficult problem produces the fewest numbers of vias ever reported in the literature.

A floorplan design algorithm is presented which is based on the following: (1) a new representation of order-5 hierarchical floorplan by normalized 2-5 Polish expressions; (2) a novel neighborhood structure defined by a set of four moves that bring a solution to its neighboring solutions; (3) an efficient floorplan area optimization algorithm for general hierarchical floorplans that makes the cost function evaluations possible; and (4) the search technique of simulated annealing. The algorithm generates nonslicing floorplans. It is a natural but nontrivial extension of the algorithm of D.F. Wong and C.L. Liu (Proc. 23rd ACM/IEEE Design Automation Conf., p.101-7, 1986). The present algorithm is compared with Wong and Liu's, and improvement was obtained in the test samples.>

We illustrate the usefulness of communicating finite state machines in modeling a number of physical layer protocols that include (i) an asynchronous start-stop protocol and (ii) a protocol for synchronous transmission with modems. Each protocol is modeled as a network of four finite state machines that communicate by exchanging messages over unbounded, FIFO channels. (Two machines are used to model the protocol itself, while the other two are used to model its interface to the upper data link protocol in the protocol hierarchy.) We outline a methodology to verify communication boundedness and progress for each protocol model. The methodology is based on three techniques that were proposed earlier to verify networks of communicating finite state machines; they are network decomposition, machine equivalence, and closed covers.