With the increasing integration of measurement devices, the control and observation of power distribution systems have become significantly more dependent on cyberspace, making them more vulnerable to false data injection attacks (FDIAs). Contrary to the detection of FDIAs in power transmission systems, less attention has been paid to power distribution systems due to poor data quality, large volume sizes, and unbalanced data. This article proposes a dual-stage localization detection strategy for FDIAs in power distribution systems to detect and localize stealth FDIAs. Considering the time scale, arithmetic, and calculation overhead, this strategy can be transformed into two stages: presence detection and localization detection. Specifically, a cost-sensitive loss convolutional neural network based on Gaussian mixture autoencoder architecture is leveraged to capture data features from unbalanced data in presence detection. In localization detection, a Markov chain based on a cumulative state transfer probability (CSTP) is leveraged to locate the FDIAs exactly after presence detection. In this subject, presence detection can support the operator in rapidly filtering out compromised data, and localization detection can drive the control center to deploy countermeasures accurately. Based on the adjusted IEEE 14 and 118-bus test systems, numerical results indicate the effectiveness of the proposed strategy.

This paper responds to official policies by exploring the positive role of electric power data in areas such as financial risk control. It aims to provide decision support for State Grid Corporation in data monetization and innovative business models, while addressing pain points for governments, financial institutions, and other businesses. By integrating electric power data, the project establishes an enterprise credit evaluation model to overcome the limitations of traditional credit profiling. Leveraging data mining methods and statistical modeling techniques, a credit scorecard model is developed based on electric power data, enabling the calculation of credit scores and corresponding risk levels. This model enhances risk prevention and decision-making effectiveness for relevant institutions. The project contributes to the systematic, normalized, and sustainable development of electric power big data credit reporting, serving other credit markets and promoting the improvement of various credit platforms. The findings provide a foundation for market participants to assess overall risk situations and improve credit risk management. This paper demonstrates the value of integrating electric power data in credit assessment and highlights its potential for enhancing risk control and decision-making processes.

Many efficient open-source suffix sorters using the induced sorting (IS) method to build the fundamental data structure suffix array (SA) for compressing and indexing data have been proposed. To avoid potential faults caused by possible implementation bugs, checking the output SA from any IS sorter without engineering warranty for correctness is a de-facto process. The existing SA checkers commonly perform checking after an SA is built completely, with significant time and space complexities compared with that of builders. This article proposes an efficient solution for building and checking SA simultaneously by enhancing the original IS method with a checking scheme using hash computations to on-the-fly verify the results produced by the last induction phase of IS method. Given an input of constant alphabet, this checking scheme requires linear time and constant RAM space when running on external memory, and its time and space overheads are negligible compared with that for building SA. In our experiments on real-world data, the proposed methods take advantages over the counterparts of existing SA checkers by running faster with less space. This work can help provide a value-added bonus feature for open-source IS sorters to guarantee the correctness of a built SA, and such a feature should be desirable for applications using these sorters.

For full-text indexing of massive data, the suffix and LCP (longest common prefix) arrays have been recognized as fundamental data structures, and there are at least two needs in practice for checking their correctness, i.e., program debugging and verifying the arrays constructed by probabilistic algorithms. Two probabilistic methods are proposed to check the suffix and LCP arrays of constant or integer alphabets in external memory using a Karp-Rabin fingerprinting technique, where the checking is wrong only with a negligible error probability. The first method checks the lexicographical order and the LCP-value of two suffixes by computing and comparing the fingerprints of their LCPs. This method is general in terms of that it can verify any full or sparse suffix/LCP array of any order. The second method uses less space, it first employs the fingerprinting technique to verify a subset of the given suffix and LCP arrays, from which two new suffix and LCP arrays are induced and compared with the given arrays for verification, where the induced suffix and LCP arrays can be removed for constant alphabets to save space.

Computing the Lempel–Ziv factorization (LZ77) of a string is a key step in many applications. However, at the same time, it constitutes a bottleneck of the entire computation. The investigation of time and space efficient computation of the LZ77 has become an important topic. In this paper, we present a lightweight linear-time algorithm called LZone for computing the LZ77, which is designed by improvements on the existing linear-time space efficient LZ77 algorithm BGone for speed acceleration. For an input string T[1..n] over a constant alphabet size of O(1), LZone requires only n words of workspace in addition to the input string and the output factorization, ⌈logn⌉ bits per word. This is the same space requirement for the algorithm BGone. LZone has two versions, LZoneT and LZoneSA, corresponding to BGoneT and BGoneSA, respectively. Our experimental results show that for computing the LZ77 from an input string T, LZoneT and LZoneSA run at around 26% and 57%, respectively, faster than their counterparts in BGone. Moreover, for computing the LZ77 from the suffix array of T, the speed of LZoneSA is on average twice that of BGoneSA. Copyright © 2015 John Wiley & Sons, Ltd.

We present in this article an external memory algorithm, called disk SA-IS (DSA-IS), to exactly emulate the induced sorting algorithm SA-IS previously proposed for sorting suffixes in RAM. DSA-IS is a new disk-friendly method for sequentially retrieving the preceding character of a sorted suffix to induce the order of the preceding suffix. For a size n string of a constant or integer alphabet, given the RAM capacity Ω (( nW ) 0.5 ), where W is the size of each I/O buffer that is large enough to amortize the overhead of each access to disk, both the CPU time and peak disk use of DSA-IS are O ( n ). Our experimental study shows that on average, DSA-IS achieves the best time and space results of all of the existing external memory algorithms based on the induced sorting principle.

The gap between high throughput demand of Internet traffic and low speed capacity of a router's interface has become a bottleneck for packet forwarding. One way to close the gap is to employ a parallel mechanism, where the route lookups of multiple packets are processed simultaneously, yielding a substantial improvement in the system's throughput. This paper proposes a new pipelined trie-based routing architecture with multiple memory blocks, in which a routing table is organized as a prefix trie and the latter is further decomposed into a main trie and multiple subtries containing the lower-level and higher-level nodes, respectively. Further, the main trie is converted into an index table and the subtries are evenly distributed into all the memory blocks. A storage management technique called random duplicate allocation (RDA) is employed to balance the storage demands among all the memory blocks. Specifically, for each subtrie, the root node is stored in a randomly selected memory block, and the descendant nodes are stored in the subsequent memory blocks level by level, in a circular manner of one block for a level. The results of computer simulation experiments indicate that the routing system's aggregate throughput grows almost linearly proportional to the number of memory blocks.