Demo Data from EDBT 2026 / reviewers in the wild / expert
Arijit Laha
dblp:44/511
· DBLP profile ↗
14ranked-venue papers
11as first author
0since 2021 · last 2011
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 4 · 4 first-authorSystems, architecture and hardware · 3 · 2 first-authorDatabases, data management, data science and information retrieval · 2 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 2 · 2 first-authorSecurity and privacy · 1Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-authorHuman-computer interaction and ubiquitous computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer graphics and multimedia
1 paper |
Image and video coding · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Image and video coding › quantization › vector quantization
codebook design |
0.0 | 1 | 2004 | Design of vector quantizer for image compression using self-organizing feature map and surface fitting · IEEE Trans. Image Process. 2004 |
Image and video coding
image compression |
0.0 | 1 | 2004 | Design of vector quantizer for image compression using self-organizing feature map and surface fitting · IEEE Trans. Image Process. 2004 |
Image and video coding › quantization
vector quantization |
0.0 | 1 | 2004 | Design of vector quantizer for image compression using self-organizing feature map and surface fitting · IEEE Trans. Image Process. 2004 |
Electronic design automation
circuit simulation |
0.0 | 1 | 1980 | The use of graphics processors for circuit design simulation at GTE AE Labs · DAC 1980 |
Electronic design automation
circuit analysis |
0.0 | 1 | 1980 | The use of graphics processors for circuit design simulation at GTE AE Labs · DAC 1980 |
Methods — techniques the papers use, named apart from their topics
self-organizing feature map · 0.0huffman coding · 0.0cubic surface fitting · 0.0graphics processor interfacing · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2011 | Compositional Information Extraction Methodology from Medical Reports
Pratibha Rani, Raghunath Reddy, Devika Mathur, Subhadip Bandyopadhyay, Arijit Laha |
DASFAA (2) | 5 |
| 2007 | Building contextual classifiers by integrating fuzzy rule based classification technique and k-nn method for credit scoring
Arijit Laha |
Adv. Eng. Informatics | 1 |
| 2006 | Developing Credit Scoring Models with SOM and Fuzzy Rule Based k-NN ClassifiersabstractCredit-risk evaluation is a very challenging and important problem in the domain of financial analysis. Many classification methods have been proposed in the literature to tackle this problem. Statistical and neural network based approaches are among the most popular paradigms. However, most of these methods produce so called "hard" classifiers, those generate decisions without any accompanying confidence measure. In contrast, "soft" classifiers, such as those designed using fuzzy set theory produce a measure of support for the decision (and also alternative decisions) that provide the analyst with greater insight. In this paper we propose a method of building credit scoring models using a fuzzy rule based classifier. The rule base is learned from the training data using a SOM based method. Further the classifier incorporates fuzzy k-NN rule for contextual classification as well as employ data reduction technique using SOM for creating a smaller set of reference points to search the k neighbors from. A method of seamlessly integrating business constraints into the model is also demonstrated. Arijit Laha |
FUZZ-IEEE | 1 |
| 2006 | Accelerated codebook searching in a SOM-based Vector QuantizerabstractKohonen's SOM algorithm has been used successfully by some researchers for designing codebooks. However, while performing an exhaustive search in a large codebook with high dimensional vectors, the encoder faces a significant computational barrier. Due to its topology preservation property, SOM holds a good promise of being utilized for fast codebook searching. In this paper we develop a method for fast codebook searching by exploiting the topology preservation property of SOM. This method performs non-exhaustive search of the codebook to find a good match for a input vector. The method is a general one that can be applied to various signal domains. In the present paper its efficacy is demonstrated with spatial vector quantization of gray-scale images. Arijit Laha, Bhabatosh Chanda, Nikhil R. Pal |
IJCNN | 1 |
| 2006 | Land cover classification using fuzzy rules and aggregation of contextual information through evidence theoryabstractLand cover classification using multispectral satellite images is a very challenging task with numerous practical applications. We propose a multistage classifier that involves fuzzy rule extraction from the training data and then the generation of a possibilistic label vector for each pixel using the fuzzy rule base. To exploit the spatial correlation of land cover types, we propose four different information aggregation methods which use the possibilistic class label of a pixel and those of its eight spatial neighbors for making the final classification decision. Three of the aggregation methods use the Dempster-Shafer theory of evidence, while the remaining one is modeled after the fuzzy k-NN rule. The proposed methods are tested with two benchmark seven-channel satellite images, and the results are found to be quite satisfactory. They are also compared with a Markov random field model-based contextual classification method and found to perform consistently better. Arijit Laha, Nikhil R. Pal, Jyotirmay Das |
IEEE Trans. Geosci. Remote. Sens. | 1 |
| 2005 | Intrusion Detection System Using Sequence and Set Preserving Metric
Pradeep Kumar 0001, M. Venkateswara Rao, P. Radha Krishna 0001, Raju S. Bapi, Arijit Laha |
ISI | 5 |
| 2005 | Parallel algorithms for identifying convex and non-convex basis polygons in an image
Arijit Laha, Amitava Sen, Bhabani P. Sinha |
Parallel Comput. | 1 |
| 2004 | Detecting Topology Preserving Feature Subset with SOM
Arijit Laha |
CIT | 1 |
| 2004 | An Empirical Study on the Robustness of SOM in Preserving Topology with Respect to Link Density
Arijit Laha |
ICONIP | 1 |
| 2004 | Design of vector quantizer for image compression using self-organizing feature map and surface fittingabstractWe propose a new scheme of designing a vector quantizer for image compression. First, a set of codevectors is generated using the self-organizing feature map algorithm. Then, the set of blocks associated with each code vector is modeled by a cubic surface for better perceptual fidelity of the reconstructed images. Mean-removed vectors from a set of training images is used for the construction of a generic codebook. Further, Huffman coding of the indices generated by the encoder and the difference-coded mean values of the blocks are used to achieve better compression ratio. We proposed two indices for quantitative assessment of the psychovisual quality (blocking effect) of the reconstructed image. Our experiments on several training and test images demonstrate that the proposed scheme can produce reconstructed images of good quality while achieving compression at low bit rates. Index Terms-Cubic surface fitting, generic codebook, image compression, self-organizing feature map, vector quantization. Arijit Laha, Nikhil R. Pal, Bhabatosh Chanda |
IEEE Trans. Image Process. | 1 |
| 2002 | Parallel Algorithms for Identification of Basis Polygons in an Image
Arijit Laha, Amitava Sen, Bhabani P. Sinha |
HiPC | 1 |
| 2001 | Dynamic generation of prototypes with self-organizing feature maps for classifier design
Arijit Laha, Nikhil R. Pal |
Pattern Recognit. | 1 |
| 2001 | Some novel classifiers designed using prototypes extracted by a new scheme based on self-organizing feature mapabstractWe propose two new comprehensive schemes for designing prototype-based classifiers. The scheme addresses all major issues (number of prototypes, generation of prototypes, and utilization of the prototypes) involved in the design of a prototype-based classifier. First we use Kohonen's self-organizing feature map (SOFM) algorithm to produce a minimum number (equal to the number of classes) of initial prototypes. Then we use a dynamic prototype generation and tuning algorithm (DYNAGEN) involving merging, splitting, deleting, and retraining of the prototypes to generate an adequate number of useful prototypes. These prototypes are used to design a "1 nearest multiple prototype (1-NMP)" classifier. Though the classifier performs quite well, it cannot reasonably deal with large variation of variance among the data from different classes. To overcome this deficiency we design a "1 most similar prototype (1-MSP)" classifier. We use the prototypes generated by the SOFM-based DYNAGEN algorithm and associate with each of them a zone of influence. A norm (Euclidean)-induced similarity measure is used for this. The prototypes and their zones of influence are fine-tuned by minimizing an error function. Both classifiers are trained and tested using several data sets, and a consistent improvement in performance of the latter over the former has been observed. We also compared our classifiers with some benchmark results available in the literature. Arijit Laha, Nikhil R. Pal |
IEEE Trans. Syst. Man Cybern. Part B | 1 |
| 1980 | The use of graphics processors for circuit design simulation at GTE AE LabsabstractDesign and test engineers in some companies have resisted the use of circuit simulation programs because of the necessity of learning a special language for circuit input and of the necessity of becoming too involved in computer operations. To overcome these objections the Circuit Analysis and Simulation Group at AE Labs has designed graphics processor programs to interface between the designer and the simulation programs. This paper provides a description of the current generation of these programs. Joe Dyer, Arijit Laha, Ernest J. Moran, William D. Smart |
DAC | 2 |