An accurate metric for the time step control in the power device transient simulation is proposed. This metric contains an exponential term of the dominant time constant of the whole device structure derived from the matrix exponential term of the linearized device state equation. The proposed metric allows larger time step widths than the conventional metric of second order approximation of the local truncation error. It focuses on the dominant part of the transient response and its truncation error approximation is more accurate. In the transient device simulation, box integration method and backward Euler method are used for spatial and temporal discretization, respectively. The discretized nonlinear device equations are solved by using Newton iteration whose initial guess is given by the approximated solution of the linearized device state equation by using the dominant time constant. Total calculation time of the transient simulation of a silicon power DMOSFET by using the proposed method decreases down to 27% of that by the conventional method with keeping the current accuracy of the dominant transient response.

The authors describe a three-dimensional CAD model for submicrometer MOSFETs. The model has been implemented in a three-dimensional process/device integrated simulator, SMART-II, using a supercomputer. The MOS device model for hot electron transport is based on a modified current relation including an electron temperature effect in an inhomogeneous field. The need for an improved mobility model in an inversion layer and an impact ionization model using the recent experimental data for the mean free path is discussed with emphasis on the numerical simulation for I/V characteristics of small-geometry MOSFETs from the threshold regime to the avalanche regime. It is found that this approach is effective in realizing a three-dimensional CAD model for 0.5- mu m MOSFETs. An application of the model reveals a three-dimensional effect of avalanche breakdown behavior in small-geometry MOSFETs.>