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Paul G. Carey

dblp:45/1644 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1988
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › technology computer-aided design › process simulation
dopant diffusion modeling
0.011988
Numerical simulation of the gas immersion laser doping (GILD) process in silicon · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Electronic design automation › technology computer-aided design
process simulation
0.011988
Numerical simulation of the gas immersion laser doping (GILD) process in silicon · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988

Methods — techniques the papers use, named apart from their topics

numerical simulation · 0.0
YearPublicationVenuePosition
1988 Numerical simulation of the gas immersion laser doping (GILD) process in silicon
abstract
A simulation program that models the gas immersion laser doping (GILD) process is described. This program, which is called LASERMELT, first solves for the silicon melt depth and melt time versus laser energy fluence, and then the impurity dopant profiles using a dopant incorporation and impurity diffusion model. Experimental and simulated dopant profiles and sheet resistance values are given as functions of the laser energy fluence and number of pulses. The determination of liquid phase impurity diffusion coefficients in molten silicon is also described.>
Ettore Landi, Paul G. Carey, Thomas W. Sigmon
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2