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Ton J. Mouthaan

dblp:45/3150 · also A. J. Mouthaan · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 1996
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 86% Integrated circuit design · 14%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
electrothermal simulation
0.011996
Layout to circuit extraction for three-dimensional thermal-electrical circuit simulation of device structures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Electronic design automation › physical design
parasitic extraction
0.011996
Layout to circuit extraction for three-dimensional thermal-electrical circuit simulation of device structures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Electronic design automation › technology computer-aided design › device simulation
three-dimensional device simulation
0.011996
Layout to circuit extraction for three-dimensional thermal-electrical circuit simulation of device structures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1996
Integrated circuit design › analog and mixed-signal circuits
device modeling
0.011994
Nonisothermal device simulation using the 2D numerical process/device simulator TRENDY and application to SOI-devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994
Electronic design automation › technology computer-aided design
device simulation
0.011994
Nonisothermal device simulation using the 2D numerical process/device simulator TRENDY and application to SOI-devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994
Electronic design automation › technology computer-aided design
process and device simulation
0.011994
Nonisothermal device simulation using the 2D numerical process/device simulator TRENDY and application to SOI-devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1994

Methods — techniques the papers use, named apart from their topics

finite element method · 0.0circuit simulation · 0.0numerical simulation · 0.0heat transport modeling · 0.0
YearPublicationVenuePosition
1996 Layout to circuit extraction for three-dimensional thermal-electrical circuit simulation of device structures
abstract
In this paper, a method is proposed for extraction of coupled networks from layout information for simulation of electrothermal device behavior. The networks represent a three-dimensional (3-D) device structure with circuit elements. The electrical and thermal characteristics of this circuit representation are calculated with a circuit simulator. Spatial potential distributions, current flows, and temperature distributions in the device structure are calculated on the spatial coordinates. This simulation method can be placed between device simulation and (conventional) circuit simulation. It has been implemented in a circuit simulator and is demonstrated for simulation of self-heating in a bipolar low frequency power transistor. The main advantage of this simulation method is that not only the 3-D thermal behavior of the whole chip is simulated, but that this is also directly coupled to the electrical device behavior by means of the power dissipation and temperature distribution in the device. This offers the possibility for the circuit designer to simulate 3-D, coupled, thermal-electrical problems with a circuit simulator. As an example, the influence of the emitter contacting on the internal temperature and current distribution of a BJT is investigated.
Benno H. Krabbenborg, A. Bosma, Henk C. de Graaff, Ton J. Mouthaan
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.4
1994 Nonisothermal device simulation using the 2D numerical process/device simulator TRENDY and application to SOI-devices
abstract
The electrical characteristics of modern VLSI and ULSI device structures may be significantly altered by self-heating effects. The device modeling of such structures demands the simultaneous simulation of both the electrical and the thermal device behavior and their mutual interaction. Although, at present, a large number of multi-dimensional device simulators are available, most of them are based on physical models which do not properly allow for heat transport and other nonisothermal effects. This paper, demonstrates that the numerical process/device simulator TRENDY provides a solid base for nonisothermal device simulation, as a physically rigorous device model of carrier and heat transport has been incorporated in the TRENDY program. With respect to the boundary conditions, it is shown that inclusion of an artificial boundary material relaxes some fundamental physical inconsistencies resulting from the assumption of ideal ohmic contact boundaries. The program TRENDY has been used for studying several nonisothermal problems in microelectronics. As an example, the authors consider an ultra-thin SOI MOSFET showing that the negative slopes in the V/sub ds//spl minus/I/sub ds/ characteristics are caused by the temperature-dependence of the electron saturation velocity.>
Philip B. M. Wolbert, Gerhard K. M. Wachutka, Benno H. Krabbenborg, Ton J. Mouthaan
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.4